Dirk Pfeiffer

Epitaxial Graphene Nanoribbon Array Fabrication Using BCP-Assisted Nanolithography

A process for fabricating dense graphene nanoribbon arrays using self-assembled patterns of block copolymers on graphene grown epitaxially on SiC on the wafer scale has been developed. Etching masks comprising long and straight nanoribbon array structures with linewidths as narrow as 10 nm were fabricated, and the patterns were transferred to graphene. Our process combines both top-down and self-assembly steps to fabricate long graphene nanoribbon arrays with low defect counts. These are the narrowest nanoribbon arrays of epitaxial graphene on SiC fabricated to date.

MARVEL — Malicious alteration recognition and verification by emission of light

This paper presents a new technique for detecting chip alterations using intrinsic light emission in combination with electrical test. The key idea of this method is based on the fact that any active device emits infrared light emission when it is powered on. High sensitivity photon detectors can be employed to capture the weak emission while the chip under test is powered on and electric stimuli are applied to it. In particular, two main families of electrical test modes, static and dynamic, can be applied. Positive results of the application of this methodology as well as key challenges will be discussed in the paper, including spatial resolution, imaging processing, data interpretation, etc.

Hardmask technology for sub-100-nm lithographic imaging

The importance of hardmask technology is becoming increasingly evident as the demand for high-resolution imaging dictates the use of ever-thinner resist films. An appropriately designed etch resistant hardmask used in conjunction with a thin resist can provide the combined lithographic and etch performance needed for sub-100 nm device fabrication. We have developed a silicon-based, plasma-enhanced chemical vapor deposition (PECVD) prepared material that performs both as an antireflective coating (ARC) and a hardmask and thus enables the use of thin resists for device fabrication. This ARC/hardmask material offers several advantages over organic bottom antireflective coatings (BARC). These benefits include excellent tunability of the materials optical properties, which allows superior substrate reflectivity control, and high etch selectivity to resist, exceeding 2:1. In addition, this material can serve as an effective hardmask etch barrier during the plasma etching of dielectric stacks, as the underlying silicon oxide etches eight times faster than this material in typical fluorocarbon plasma. These properties enable the pattering of features in 1-2 μm dielectric stacks using thin resists, imaging that would otherwise be impossible with conventional processing. Potential extendibility of this approach to feature sizes below 100nm has been also evaluated. High resolution images as small as 50nm, have been transferred into a 300nm thick SiO2 layer by using Si ARC/hardmask material as an etch mask. Lithographic performance and etch characteristics of a thin resist process over both single layer and index-graded ARC/hardmask materials will be shown.

Silicon containing polymer in applications for 193 nm high NA lithography processes

The ability to extend 193 nm lithography resolution depends on increasing the numerical aperture (NA) of the exposure system, resulting in smaller depth of focus, which subsequently requires use of thinner photoresists. Bottom antireflective coatings (BARCs) are a necessity, but the organic composition of current 193 nm BARCs offers poor etch selectivity to the photoresist. As a result, image transfer with thin resists is becoming increasingly difficult. It is also more challenging to control reflectivity at high numerical apertures with a thin, single layer BARC. To address these issues, IBM has developed a new class of silicon containing BARCs. These materials exhibit high etch selectivity that will significantly improve the performance of high NA 193 nm lithography. The incorporation of silicon in the backbone of the polymers comprising these BARCS affords a high etch selectivity to conventional organic resists and therefore these polymers can be used as thick planarizing BARCs. The optical constants of these BARCs have been tuned to provide good reflectivity control at NA > 1.2 These materials can also be used as part of a dual layer BARC scheme composed of the thin organosilicon based BARC coated over a planarizing organic underlayer. This scheme has also been optically tuned to provide reflectivity suppression at high incident angles. By utilizing a thick BARC, a novel contact hole shrink process is enabled that allows tapering of the sidewall angle and controlling the post-etch critical dimension (CD) bias. Structures of the silicon containing polymer, formulation chemistry, optical tunability, lithography at high NA and RIE pattern transfer are reported.

Global optimization of masks, including film stack design to restore TM contrast in high NA TCC's

We provide an expanded description of the global algorithm for mask optimization introduced in our earlier papers, and discuss auxiliary optimizations that can be carried out in the problem constraints and film stack. Mask optimization tends inherently to be a problem with non-convex quadratic constraints, but for small problems we can mitigate this difficulty by exploiting specialized knowledge that applies in the lithography context. If exposure latitude is approximated as maximization of edge slope between image regions whose intensities must print with opposite polarity, we show that the solution space can be approximately divided into regions that contain at most one local minimum. Though the survey of parameter space to identify these regions requires an exhaustive grid search, this search can be accelerated using heuristics, and is not the rate-limiting step at SRAM scale or below. We recover a degree of generality by using a less simplified objective function when we actually assess the local minima. The quasi-binary specialization of lithographic targets is further exploited by searching only in the subspace formed by the dominant joint eigenvectors for dark region intensity and bright region intensity, typically reducing problem dimensionality to less than half that of the full set of frequency-domain variables (i.e. collected diffraction orders). Contrast in this subspace across the bright/dark edge will approximately reflect exposure latitude when we apply the standard fixed edge-placement constraints of lithography. However, during an exploratory stage of optimization we can define preliminary tolerances which more explicitly reflect constraints on devices, e.g. as is done with compactor codes for design migration. Our algorithm can handle vector imaging in a general way, but for the special case of unpolarized illumination and a lens having radial symmetry (but arbitrary source shape) we show that the bilinear function which describes vector interference within the film stack can be expressed in terms of three generic radial functions, enabling rapid numerical evaluation of the Hopkins kernel. By inspection these functions show that one can in principle recover classical scalar-like imaging even at high NA by exposing a very thin layer spaced above a reflective substack. The reflected image largely restores destructive interference in TM polarized fringes, if proper phasing is achieved. With an ideal reflector, the first-order azimuthal contrast loss term vanishes in all TCC components, and complete equivalence to scalar imaging is obtained in classical two-beam imaging.

Graded spin-on organic bottom antireflective coating for high NA lithography

Immersion lithography for the 32nm node and beyond requires advanced methods to control 193 nm radiation reflected at the resist/BARC interface, due to the high incident angles that are verified under high numerical aperture (NA) imaging conditions. Swing curve effects are exacerbated in the high NA regime, especially when highly reflective substrates are used, and lead to critical dimension (CD) control problems. BARC reflectivity control is also particularly critical when underlying surface topography is present in buried layers due to potential reflective notching problems. In this work, a graded spin-on organic BARC was developed to enable appropriate reflectivity control under those conditions. The graded BARC consists of two optically distinct polymers that are completely miscible in the casting solution. Upon film coating and post-apply baking, the two polymers vertically phase-separate to form an optically graded layer. Different characterization techniques have been applied to the study of the distribution of graded BARC components to reveal the internal and surface composition of the optically graded film, which includes Variable Angle Spectroscopic Ellipsometry (VASE) and Secondary Ion Mass Spectroscopy (SIMS). Also, optical constant optimization, substrate compatibility, patterning defectivity and etch feasibility for graded BARC layers are described. Superior 193 nm lithographic performance and reflectivity control of graded BARC beyond 1.20 NA compared to conventional BARCs is also demonstrated.

Oxygen Transport in High-k Metal Gate Stacks and Physical Characterization by SIMS Using Isotopic Labeled Oxygen

Distribution and migration of oxygen in the highk/metal gate stack has a strong impact on the CMOS transistor electrical characteristics. Excess O can cause interlayer (IL) growth and subsequent increase of Equivalent Oxide Thickness (EOT), whereas O-vacancies induced by the metal gate contact may lead to unpredictable and feature size dependent shifts in threshold voltage (Vt). In addition to these phenomena, we have recently described a new migration pathway for O in poly-Si/TiN/TiO2-based high-k/stacks [1]. Besides re-growth of the bottom IL, excess O –released by the thermal decomposition of TiO2-based high-k stacks upon annealing– was observed to diffuse upwards, resulting in SiO2 growth at the TiN/poly-Si interface, as evidenced by regular SIMS analysis following the O main isotope. Here, we have employed SIMS depth profiling in combination with isotopic labeling –using minority Oisotope– to characterize the migration and/or redistribution of O in the high-k metal gate stack (HK/MG) at different stages of processing. Firstly, the creation of vacancy defects in high-k dielectrics –induced by the TiN-based metal gate contact upon high temperature annealing– is the most probable cause for large (~500 meV) Vt shifts, which is especially problematic for pFET devices. We have demonstrated that these shifts can be largely recovered after a lowtemperature low-pressure top-down oxygenation step on TiN metal gate exposed by poly-Si removal, while preventing excessive oxidation of TiN and parasitic IL regrowth [2]. Using SIMS, we have systematically investigated the incorporation of O by SIMS for different temperatures and TiN thicknesses on TiN-gated high-k films, subjected to top-down oxygenation with isotopic labeled O2, see Figure 1. We have thus established that incorporated O-doses –needed to remove the defects created in a metal-HfO2 contact– amount 1.4e14 to 3.9e14 at.cm. In addition, O-profiles after top-down oxidation show a small but significant shift with respect to pre-existing O towards the TiN-interface (see inset Figure 1). This implies that passivation of vacancies preferentially occurs in the top portion of the high-k layer, consistent with negligibly small oxide (IL) re-growth. Secondly, remote O-scavenging from the SiO2 interlayer (IL) using a poly-Si/doped TiN metal gate stack is a promising technique to achieve aggressive EOT scaling in a gate-first flow, compliant with 16 nm technology node requirements [3]. The remote scavenging mechanism is based on the presence of a metallic element M, inserted in the TiN metal gate at a certain separation from the high-k interface. This scavenging element is capable of scavenging O from the SiO2 IL upon poly activation anneal, as evidenced by TEM and conventional O-SIMS. Here, we have employed SIMS to determine the kinetics of O-scavenging from Hf-based high-k dielectric –enriched in O by isotopic exchange after high-k deposition upon low-temperature O2 exposure– towards M-TiN alloy for different annealing temperatures and IL’s. Use of an O-isotope enriched high-k layer allows following of O-redistribution through scavenging and isotopic exchange for different annealing temperatures, see Figure 2. This approach has revealed a subtle effect of IL composition on remote O-scavenging kinetics. In addition, rapid isotopic exchange between the different interfaces through the TiN metal gate is seen to occur upon high temperature anneal, indicating rapid Odiffusion in these stacks. These examples demonstrate the benefits of using O isotope labeling for SIMS analysis to resolve small quantities of O and to obtain fundamental knowledge on oxygen transport in high-k metal gate stacks.

Verification of untrusted chips using trusted layout and emission measurements

This paper presents a novel methodology for hardware security and Trojan detection applications. The method is based on our proposed tester-based optical methodology that combines different test patterns, time-integrated and time-resolved emission measurements to localize gates, detect logic states, and identify functional block activity inside a chip in a non-invasive fashion. A detailed application example using a 90 nm bulk digital test chip shows that emission images can be effectively used to identify unexpected and missing emission signatures that may be related to chip alterations.

Towards Routine Backside SIMS Sample Preparation for Efficient Support of Advanced IC Process Development

Backside Secondary Ion Mass Spectrometry (SIMS) profiling is a seemingly simple option to circumvent commonly observed depth resolution degradation in conventional front‐side SIMS. However, large practical barriers in backside sample preparation prohibit a wider and more routine use of backside SIMS. Here, we explore the use of XeF2 dry etching instead of wet etching for removal of the residual Si‐substrate. The former process is essentially isotropic with similar etch rates for the different crystallographic orientations and highly selective towards the dense thermal oxide (BOX). This eliminates the need for high‐precision polishing of individual samples, reducing the substrate removal to a few coarse and relatively rapid polishing steps only. Moreover, XeF2 etching can be performed in unattended fashion and simultaneously on multiple samples, greatly increasing volume and turn‐around time for backside sample preparation. Here we have explained the different practical aspects and demonstrated the feasibi...

Highly etch-selective spin-on bottom antireflective coating for use in 193-nm lithography and beyond

Extending 193nm lithography to well below 100nm resolution will depend on high NA tooling coupled with thin resist processing. Semiconductor manufacturing uses BARCs (Bottom Antireflective Coating) based on organic spin coatable polymers, to improve the resolution by absorbing light that otherwise will be reflected back into the resist. However, the use of organic BARCs for patterning sub 100nm features will be limited due to poor etch selectivity to the photo resist. IBM has developed a new class of polymers that can function as planarizing BARCs. These materials show an etch selectivity to the photo resist in excess of 3:1 in fluorocarbon based ARC-open RIE chemistry. The hardmask properties of these materials for oxide open are equivalent to typical resists. Furthermore these materials can be implemented like organic ARCs and are stripped in resist strips available in manufacturing. Basic materials characterization data, optical tunability, lithographic performance with different resists, process window data, and complete integration schemes will be presented.