Dong-Hyun Im

High performance PRAM cell scalable to sub-20nm technology with below 4F2 cell size, extendable to DRAM applications

A PRAM cell with great scalability and high speed operation capability with excellent reliability below 20nm technology was demonstrated. This has the meaning of the potential applicable to the technology area of scaling limitation of DRAM cell. We fabricated a confined PRAM cell with 7.5nm×17nm of below 4F2. In particular, Sb-rich Ge-Sb-Te phase change material was employed for high speed operation below 30nsec. The excellent writing endurance performance was predicted to maintain up to 6.5E15cycles by reset program energy acceleration. Its data retention was 4.5 years at 85°C which is enough for DRAM application.

Highly reliable 0.15 μm/14 F2 cell ferroelectric random access memory capacitor using SrRuO3 buffer layer

We investigated a novel technique of modifying the interface between a Pb(ZrxTi1-x)O3 (PZT) thin film and electrodes for high density 64 Mbit ferroelectric random access memory (FRAM) device. Using a SrRuO3 buffer layer, we successfully developed highly reliable 0.15 µm/14 F2 cell FRAM capacitors with 75-nm-thick polycrystalline PZT thin films. The SrRuO3 buffer layer greatly enhanced ferroelectric characteristics due to the decrease in interfacial defect density. In PZT capacitors with a total thickness of 180 nm for whole capacitor stack, a remnant polarization of approximately 42 µC/cm2 was measured with a 1.4 V operation. In addition, an opposite state remnant polarization loss of less than 15% was observed after baking at 150 °C for 100 h. In particular, we found that the SrRuO3 buffer layer also played a key role in inhibiting the diffusion of Pb and O from the PZT thin films.

Highly reliable 50nm-thick PZT capacitor and low voltage FRAM device using Ir/SrRuO/sub 3//MOCVD PZT capacitor technology

For the first time, we successfully developed highly reliable 50nm-thick polycrystalline PZT capacitor using noble Ir/SrRuO/sub 3/ top electrode and MOCVD PZT technology. In the 50nm-thick PZT capacitor, 33/spl mu/C/cm/sup 2/ of remanent polarization and 0.7V of saturation voltage have been demonstrated. Moreover, after 100hrs of bake-time at 150/spl deg/C, opposite-state polarization margin was over 23/spl mu/C/cm/sup 2/, which is world-wide best result so far achieved. Using this capacitor technology, highly reliable low voltage operating embedded FRAM device was successfully developed.

STUDY ON ELECTRICAL PROPERTIES OF FLATTENED MOCVD PZT FILM BY CMP PROCESS

ABSTRACT In this paper, we first applied the Chemical Mechanical Polishing (CMP) and post-CMP cleaning processes to the planarization of ferroelectric film in order to obtain good planarity of electrode/ferroelectric film interface for ferroelectric random access memories (FRAM) applications. We investigated the structural and electrical characteristics of MOCVD PZT films grown on Ir bottom electrode before and after CMP process. The surface roughness of 100 nm PZT thin film was so distinctly reduced by CMP process that RMS and peak-to-valley values decreased from 4 nm and 50 nm to 0.2 nm and 5 nm, respectively. Moreover leakage current and retention characteristics of polished ferroelectric capacitors were improved by reducing PZT film roughness. Since high leakage current has been a main obstacle in operating thin PZT ferroelectrics, this indicates that PZT surface roughness produced by MOCVD process should be minimized for acquiring low voltage of FRAM application. No degradation in polarization hysteresis and fatigue characteristics of polished PZT capacitors was observed when favorable polishing process condition such as low down-pressure and slow table-speed was applied. In addition, post-CMP cleaning with an appropriate cleaning solution effectively removed slurries on PZT film without any further degradation. These results suggest that PZT CMP and post-CMP cleaning will be useful tool for acquiring highly-planarized thin MOCVD PZT film for next generation FRAM application.

ENHANCED RETENTION PROPERTIES OF Pb(Zr,Ti)O3 THIN FILM BY APPLYING PbTiO3 SEED LAYER

ABSTRACT Reliable ferroelectric 100 nm-thick PZT capacitors for 1.6 V operating FRAM device were successfully developed using MOCVD PZT with a PbTiO3 seed layer process. PbTiO3 seed layer process improved the opposite-state retention properties of polycrystalline PZT films by enhancing the (111) texture. We demonstrated that the same sensing-margin of FRAM device was obtained regardless of PbTiO3 seed layer insertion, while the retention properties were considerably improved.

RELIABLE PZT CMP TECHNOLOGY FOR NOVEL FRAM CAPACITORS

ABSTRACT In this paper, we report novel (TE-free) FRAM capacitors using reliable PZT CMP process in order to improve ferroelectric properties and enhance mass productivity by simplifying integration of processes. FRAM capacitors were prepared using a PZT film for a stopping layer in ILD CMP using a high selective slurry having a very low PZT removal rate relative to oxide removal rate. Noble metal electrode (TE) and contact (TEC) of conventional (TE/FE/BE) capacitors are not desirable for integration of high-density FRAM device and mass production due to contact etch damage and poor etch and deposition properties of Ir. We investigated the structural and electrical characteristics of MOCVD PZT films grown on Ir bottom electrode before and after PZT CMP process. Even though some degradation in polarization hysteresis of polished PZT capacitors was observed compared to as-deposited capacitors due to interface effect between PZT film and top electrode, electrical properties such as leakage current and fatigue were not sensitive to CMP process variables including down pressure, table speed and polishing time, indicating enough process margin in application of PZT CMP technology. In addition, PZT film roughness was dramatically reduced to result in decrease of leakage current due to the reduction of valley area. In this study, we claimed that new CMP technology with high selective slurry to PZT film was a useful approach in achieving novel FRAM capacitors by simplifying integration processes of FRAM device.