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Dive into the research topics where Ji-Eun Lim is active.

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Featured researches published by Ji-Eun Lim.


international electron devices meeting | 2005

Fabrication of 3D trench PZT capacitors for 256Mbit FRAM device application

June-mo Koo; Bum-seok Seo; Suk-pil Kim; Sangmin Shin; Jung Hyun Lee; Hionsuck Baik; Jangho Lee; Junho Lee; Byoung-Jae Bae; Ji-Eun Lim; Dong-Chul Yoo; Soonoh Park; Hee-Suk Kim; Hee Han; Sunggi Baik; Jae-Young Choi; Yong Jun Park; Young-soo Park

We fabricated trench PbZrxTi1-xO3 (PZT) capacitors that can be used in 256Mbit 1T-1C FRAM devices. The capacitor has 0.25mum diameter and 0.4mum depth. Three layers, Ir(20nm)/PZT(60nm)/Ir(20nm), were deposited in SiO2 trench holes by ALD and MOCVD. Both columnar and granular grains were formed on the sidewalls of the trench capacitors, and their relative portion had strong size dependence. The trench capacitors with more columnar PZT grains showed good switching behavior under 2.1V external bias and 19 to 24 muC/cm2 remnant polarization


Japanese Journal of Applied Physics | 2006

Highly reliable 0.15 μm/14 F2 cell ferroelectric random access memory capacitor using SrRuO3 buffer layer

Jang-Eun Heo; Byoung-Jae Bae; Dong-Chul Yoo; Sang-don Nam; Ji-Eun Lim; Dong-Hyun Im; Suk-ho Joo; Yong-Ju Jung; Suk-Hun Choi; Soonoh Park; Hee-seok Kim; U-In Chung; Joo-Tae Moon

We investigated a novel technique of modifying the interface between a Pb(ZrxTi1-x)O3 (PZT) thin film and electrodes for high density 64 Mbit ferroelectric random access memory (FRAM) device. Using a SrRuO3 buffer layer, we successfully developed highly reliable 0.15 µm/14 F2 cell FRAM capacitors with 75-nm-thick polycrystalline PZT thin films. The SrRuO3 buffer layer greatly enhanced ferroelectric characteristics due to the decrease in interfacial defect density. In PZT capacitors with a total thickness of 180 nm for whole capacitor stack, a remnant polarization of approximately 42 µC/cm2 was measured with a 1.4 V operation. In addition, an opposite state remnant polarization loss of less than 15% was observed after baking at 150 °C for 100 h. In particular, we found that the SrRuO3 buffer layer also played a key role in inhibiting the diffusion of Pb and O from the PZT thin films.


Integrated Ferroelectrics | 2005

STUDY ON ELECTRICAL PROPERTIES OF FLATTENED MOCVD PZT FILM BY CMP PROCESS

S. H. Choi; Byoung-Jae Bae; Yong-Hoon Son; Ji-Eun Lim; Dong-Chul Yoo; Dong-Hyun Im; Jinseong Heo; Seungki Nam; J.H. Park; C. K. Hong; H. K. Cho; Joo Tae Moon

ABSTRACT In this paper, we first applied the Chemical Mechanical Polishing (CMP) and post-CMP cleaning processes to the planarization of ferroelectric film in order to obtain good planarity of electrode/ferroelectric film interface for ferroelectric random access memories (FRAM) applications. We investigated the structural and electrical characteristics of MOCVD PZT films grown on Ir bottom electrode before and after CMP process. The surface roughness of 100 nm PZT thin film was so distinctly reduced by CMP process that RMS and peak-to-valley values decreased from 4 nm and 50 nm to 0.2 nm and 5 nm, respectively. Moreover leakage current and retention characteristics of polished ferroelectric capacitors were improved by reducing PZT film roughness. Since high leakage current has been a main obstacle in operating thin PZT ferroelectrics, this indicates that PZT surface roughness produced by MOCVD process should be minimized for acquiring low voltage of FRAM application. No degradation in polarization hysteresis and fatigue characteristics of polished PZT capacitors was observed when favorable polishing process condition such as low down-pressure and slow table-speed was applied. In addition, post-CMP cleaning with an appropriate cleaning solution effectively removed slurries on PZT film without any further degradation. These results suggest that PZT CMP and post-CMP cleaning will be useful tool for acquiring highly-planarized thin MOCVD PZT film for next generation FRAM application.


Integrated Ferroelectrics | 2005

ENHANCED RETENTION PROPERTIES OF Pb(Zr,Ti)O3 THIN FILM BY APPLYING PbTiO3 SEED LAYER

Byoung-Jae Bae; Ji-Eun Lim; Dong-Chul Yoo; Seungki Nam; Jinseong Heo; Dong-Hyun Im; B. O. Cho; Su-Jin Park; Hyun-Su Kim; U-In Chung; Joo Tae Moon

ABSTRACT Reliable ferroelectric 100 nm-thick PZT capacitors for 1.6 V operating FRAM device were successfully developed using MOCVD PZT with a PbTiO3 seed layer process. PbTiO3 seed layer process improved the opposite-state retention properties of polycrystalline PZT films by enhancing the (111) texture. We demonstrated that the same sensing-margin of FRAM device was obtained regardless of PbTiO3 seed layer insertion, while the retention properties were considerably improved.


Integrated Ferroelectrics | 2004

The Effect of Iridium Bottom Electrode on the Characteristics of Pb(Zr,Ti)O3 Films Grown by MOCVD Method

Byoung-Jae Bae; Kyu-Mann Lee; Ji-Eun Lim; Seungki Nam; Kyung-ho Park; Dong-Chul Yoo; Chang-seung Lee; Moon-Sook Lee; Su-Jin Park; Hyung-Gon Kim; U-In Chung; Joo Tae Moon

A novel method of metal-organic chemical vapor deposition (MOCVD) Pb(Zr,Ti)O3 (PZT) has been developed for use in high-density ferroelectric memory device. Well-aligned polycrystalline PZT films were grown onto Iridium bottom electrode by the MOCVD method with tmhd-family precursors in octane-based solvent under oxygen atmosphere at 550°C. Moreover, crystallinity of the PZT films on Ir bottom electrode was improved dramatically by inserting TiAlN barrier layer. It is also investigated the Iridium bottom electrode effect on the PZT in the ways of roughness, grain size, remnant polarization, fatigue and retention properties. Resultantly, highly reliable (111)-oriented PZT capacitors were obtained with 2Pr of 45 μC/cm2 and Vc of 0.8 V through MOCVD method and the interface engineering of the Iridium bottom electrode.


Ferroelectrics | 2004

Novel PZT capacitor technology for high density FRAM device with 0.18 μm D/R

Kwang-Hyun Lee; Kyung-ho Park; Seungki Nam; Byoung-Jae Bae; Ji-Eun Lim; Moon-Sook Lee; Suk-ho Joo; Sung-Lae Cho; Su-Jin Park; U-In Chung; Joo Tae Moon

Novel capacitor technologies for high density FRAM device with 0.18 μm D/R (design-rule) have been researched and developed. In order to realize the high-density FRAM device with 0.18 μm D/R, the PZT film was modified by changing Zr/Ti composition and by using PTO seeding layer. Therefore, the crystallization temperature of the PZT film could be successfully lowered to 550°C. The remnant polarization of PTO-used 100 nm thick PZT capacitors measured at 2.7 V was approximately 24 μC/cm 2 , that is 30% higher than that of the PTO-unused PZT capacitors. Necessarily, as the PZT thickness and crystallization temperature are lowered, the thickness of bottom electrode can be reduced as well. Furthermore, by lowering the PZT crystallization temperature and by applying robust TiAlN oxidation barrier, low (300 Ω/contact) and stable contact resistance in a very small size of BC could be obtained. Finally, we successfully developed a capacitor stack height of 270 nm. The capacitor size was 0.26 × 0.44 μm2 and remnant polarization measured at 2.7 V was approximately 11 μC/cm2.


Archive | 2005

Showerhead with branched gas receiving channel and apparatus including the same for use in manufacturing semiconductor substrates

Ji-Eun Lim; Byoung-Jae Bae; Young-Bae Choi


Archive | 2007

Metal precursors for low temperature deposition and methods of forming a metal thin layer and manufacturing a phase-change memory device using the metal precursors

Hye-young Park; Sung-Iae Cho; Byoung-Jae Bae; Jin-Il Lee; Ji-Eun Lim; Young-Lim Park


Archive | 2007

METHOD OF FORMING A PHASE-CHANGEABLE LAYER AND METHOD OF MANUFACTURING A SEMICONDUCTOR MEMORY DEVICE USING THE SAME

Young-Lim Park; Sung-Lae Cho; Byoung-Jae Bae; Jin-Il Lee; Hye-young Park; Ji-Eun Lim


Archive | 2007

METHODS OF FORMING A SEMICONDUCTOR DEVICE INCLUDING A PHASE CHANGE MATERIAL LAYER

Byoung-Jae Bae; Sung-Lae Cho; Jin-Il Lee; Hye-young Park; Ji-Eun Lim; Young-Lim Park

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