Dong-Il Seo
Samsung
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Publication
Featured researches published by Dong-Il Seo.
IEEE Journal of Solid-state Circuits | 2003
Jae-Yoon Sim; Hongil Yoon; Ki-Chul Chun; Hyun-Seok Lee; Sang-pyo Hong; Kyu-Chan Lee; Jei-Hwan Yoo; Dong-Il Seo; Soo-In Cho
To verify three important circuit schemes suitable for DRAMs in mobile applications, a 1.8-V 128-Mb SDRAM was implemented with a 0.15-/spl mu/m technology. To achieve an ideal 33% efficiency, the double boosting pump uses two capacitors series connection at pumping phase, while they are precharged in parallel. The hybrid folded current sense amplifier together with a novel replica inverter connection improved power and speed performances. Also, a dual-referenced adjustment scheme for a temperature sensor was proposed to allow a very high accuracy in tuning. Without loss in productivity, the implemented dual-referenced searching technique achieved tuning error of less than /spl plusmn/2.5/spl deg/C.
symposium on vlsi circuits | 1990
Dong-Sun Min; Dong-Il Seo; Jehwan You Jehwan You; Soo-In Cho; Dae-Je Chin; Yoonjung Park
The wordline architecture of the twisted word line (TWL) scheme and a wordline latch circuit for suppressing wordline coupling noise have been proposed and demonstrated. Using this approach, wordline coupling noise is reduced by 70% compared to the conventional wordline structure. This technique was found to be effective for suppressing wordline coupling noise with minimum layout penalty in scaled high-density DRAMs
symposium on vlsi circuits | 2002
Jae-Yoon Sim; Hongil Yoon; Ki-Chul Chun; Hyun-Seok Lee; Sang-pyo Hong; Soo-Young Kim; Min-Soo Kim; Kyu-Chan Lee; Jei-Hwan Yoo; Dong-Il Seo; Soo-In Cho
A 1.8V 128Mb SDRAM is implemented for low current mobile applications with a 0.15/spl mu/m technology. The double boosting pump and hybrid current sense amplifier schemes are optimized for the low voltage regime with high pumping efficiency and stable I-to-V gain, respectively. A temperature sensor together with the binary weighted adjustment technique allow a very accurate implementation without loss in productivity.
symposium on vlsi circuits | 2003
Jae-Yoon Sim; Young-Gu Gang; Kyu-Nam Lim; Joong-Yong Choi; Sang-Keun Kwak; Ki-Chul Chun; Jei-Hwan Yoo; Dong-Il Seo; Soo-In Cho
A 256 Mb SDRAM is implemented with a 0.12 /spl mu/m technology to verify two circuit schemes suitable for mobile application. A charge transferred presensing is proposed to achieve fast low-voltage sensing and robust operation. With a precharge disabler for productivity, new negative word-line scheme is also proposed to bypass the majority of discharging current to VSS without switching control.
Archive | 2006
Jong-Hyun Choi; Dong-Il Seo
Archive | 2000
Jong-Hyun Choi; Dong-Il Seo; Jong-sik Suji-eub Yongin-city Na
Archive | 2006
Young-Hun Seo; Dong-Il Seo; Kyu-Chan Lee; Jong-Hyun Choi
Archive | 2003
Jae-Yoon Sim; Dong-Il Seo
Archive | 1998
Dong-Il Seo; Sei-Seung Yoon
Archive | 2003
Jae-hoon Kim; Dong-Il Seo; Hyo-jin Oh