Douglas A. Prinslow

Kinetics and nucleation model of the C49 to C54 phase transformation in TiSi2 thin films on deep‐sub‐micron n+ type polycrystalline silicon lines

A detailed kinetic study of the C49 to C54 phase transformation in TiSi2 thin films was performed, to obtain the full time, temperature, and linewidth dependence of the fraction transformed during rapid thermal annealing on patterned deep‐sub‐micron lines. A Johnson–Mehl–Avrami kinetic analysis showed Avrami exponents of 0.8±0.2 for all submicron lines and 1.9±0.2 for a 40 μm side square structure. The activation energy of 3.9 eV was independent of linewidth. Transformation times increased dramatically as linewidth decreased. A kinetic model based on the density of nucleation sites as a function of linewidth and C49 grain size is proposed and shown to fit the data.

An integrated approach for accurate simulation and modeling of the silicide-source/drain structure and the silicide-diffusion contact resistance

We present the first integrated simulation and modeling approach for the silicide-source/drain structure, and for the silicide-diffusion contact resistance; thus, providing the critical link between electrical performance and the processing/structural variables forming the silicide source/drain region. We apply this approach to predict the silicide-diffusion contact resistance accurately, and to improve transistor performance significantly.

Process Design & Integration of Salicide and Source/Drain Process Modules for Improved Device Performance

In integrated circuit (IC) fabrication, understanding and optimizing process interactions and variability is critical for swift process integration and performance enhancement, especially at dimensions ≤0.25μm. We present here an approach to address this challenge, and we apply it to improve the process design for two critical modules in a typical CMOS IC process—salicide and source/drain. Together, these modules impact the silicide-to-diffusion contact resistance (R c ), and the gate sheet resistance (R s ); which, in turn, significantly affect transistor series resistance and circuit delays respectively. In our approach, we have investigated a process domain consisting of both silicide and source/drain process variables; and we have developed a quantitative framework for analysis and optimization, along with qualitative insight into underlying the physical mechanisms. We demonstrate that the transistor drive current (I d ) improves by ≈5‥, and circuit performance, as measured by the figure-of-merit (FOM), by ≈4‥. This improvement is significant, and an added benefit is that other transistor characteristics such as effective channel length, off-current, substrate current etc. are affected minimally. Finally, we use this approach to optimize trade-offs such as R c vs R s and performance vs manufacturability; thus enabling manufacturable processes that meet the requirements for high performance.

A model-based approach for process design and its application to the titanium salicide process

Process technology development constitutes a significant cost in manufacturing integrated circuits. In this paper, we present a model-based approach for developing new process technology rapidly and inexpensively, using the salicide process to demonstrate the concepts. This approach is applied to evaluate performance tradeoffs, to develop insight into the underlying process physics, to quantify the impact of the salicide process on the device and circuit performance, and to estimate the process variability. The key idea of this approach is to group a sequence of process steps into a process module, and build simple and accurate process models for the module. The paper also illustrates the use of this model-based approach in synthesizing optimal processes rapidly based on requirements, contributing to the reduction of technology development cost and cycle time.