Douglas B. Hunt

System and method for on-chip debug support and performance monitoring in a microprocessor

Method for processing information in a microprocessor to facilitate debug and performance monitoring

Method to increase performance in a multi-level cache system by the use of forced cache misses

Computer system having an instruction for probing memory latency

Reducing branch prediction interference of opposite well behaved branches sharing history entry by static prediction correctness based updating

Methods and apparatus for reducing interference in a branch history table of a microprocessor

Changing the meaning of a pre-decode bit in a cache memory depending on branch prediction mode

Adding a field to the cache tag in a computer system to indicate byte ordering

Apparatus and method for comparing a group of binary fields with an expected pattern to generate match results

Method for handling errors detected in a computer system