E. H. Wong

Moisture-induced failures of adhesive flip chip interconnects

Adhesive flip chip interconnect has been recognized as a promising substitute for solder interconnection due to its fine-pitch, lead-free, and low-temperature processing capabilities. As adhesives are made of polymers, moisture absorption by the polymeric resin remains as one of the principal contributors to adhesive joint failure mechanisms. In this research, the reliability performance of the adhesive flip chip in the pressure cooker test and moisture sensitivity test conditions was investigated. The failure modes were found to be interfacial delamination and bump/pad opening which may eventually lead to total loss of electrical contact. Different sizes of bump/pad opening in the interconnections were discussed in the context of the significance of mismatch in coefficient of moisture expansion (CME) between adhesive and other components in the package, which induces a hygroscopic swelling stress. The effect of moisture diffusion in the package and the CME mismatch were also evaluated from the standpoint of finite element modeling. In this study, it is concluded that hygroscopic swelling assisted by loss of adhesion strength upon moisture absorption is responsible for the moisture-induced failures in these adhesive flip chip interconnects.

Thermo-mechanical finite element analysis in a multichip build up substrate based package design

Abstract This paper presents a thermo-mechanical analysis of a multichip module (MCM) package design, with emphasis on the package warpage, thermally induced stress and the second level solder joint reliability. The MCM package contains four flip chips which are mounted on a build up substrate. First, the effect of the positioning of four silicon dice within the MCM package on the warpage of the package is studied. Second, the effect of package dimensions (the heat spreader thickness, the structural adhesive thickness and the substrate thickness) on the maximum residual stress as well as the warpage of the package is performed. Finally, this paper presents a 3D sliced model for solder joint reliability of the MCM assembly. A creep constitutive relation is adopted for the 63Sn/37Pb solder to account for its time and temperature dependence in thermal cycling. The fatigue life of solder joint is estimated by the Darveauxs approach. A series of parametric study is performed by changing the package dimensions. The results show that the largest die tends to experience highest stresses at its corner and has more influence on the warpage of the package than smaller dice. The results also show the most sensitivity factors that affect the package warpage and the second level solder joint reliability are the substrate thickness and the heat spreader thickness. The structural adhesive thickness has no major effect on the package warpage, the maximum von Mises stress of the package and the second level solder joint reliability.

High-speed bend test method and failure prediction for drop impact reliability

The objective of this study is to obtain experimental failure models governing solder joint failure during drop impact testing of board assemblies. A high-speed bend test was developed to perform displacement-controlled bend test of board assemblies at the high flexing frequencies of drop impact. These test frequencies and amplitudes are not achievable by conventional universal testers. Experimental data was obtained for various PCB strain amplitudes, flexural frequencies solder alloys and pad finishes. Results from the high-speed bend tests are used to construct constant amplitude power law fatigue curves. Solder joint reliability found to be dependent on the test frequency, and therefore strain rate. The experimental failure data from these high-speed bend tests are a required basis for a drop impact failure criterion which can take into account frequency and amplitude effects and which is general enough to be applied to product level testing

Micro impact characterisation of solder joint for drop impact application

Good correlation has been established between high speed shearing of solder joint at component level and board level drop tests, endorsing high speed shearing as a viable quality assurance test for manufacturing and incoming inspection. The high speed shear characteristics of solder joints under different test conditions (shear speed, shear angle, and temperature) and aging conditions (multiple reflow, temperature humidity, and salt spray) have been evaluated. Preliminary S-N characteristic for SnPb_OSP and SnAg_OSP solder joints have been generated using high speed cyclic bends test. These could be devolved into a life prediction model for board level solder joints in product drop impact

Correlation of material properties to reliability performance of anisotropic conductive adhesive flip chip packages

The anisotropic conductive adhesive (ACA) is a promising solder alternative candidate that shows potential for further pitch reduction. Although much work has been published on ACA joint behavior, study on correlation of material properties with reliability performance is still lacking. The main objective in this study was to identify the impact of material properties on reliability, so as to engineer highly reliable microelectronics assemblies. Four representative ACA materials (both film and paste types) with diverse properties were selected. Material properties were characterized as close as possible to stress test conditions so as to allow more accurate correlation predictions. Reliability performance was obtained by assembling test chips of 200-/spl mu/m pitch onto BT-substrates, then subjecting them to reliability tests. Correlation analysis was conducted and key material properties that contributed to good reliability performance were identified. Findings indicated that the best properties for high reliability assemblies were: high adhesion strength after subjecting to stress aging, low coefficient of moisture expansion (CME) and low elastic modulus (E).

Investigation of cure kinetics and its effect on adhesion strength of nonconductive adhesives used in flip chip assembly

The reaction kinetics of a commercial fast cure nonconductive adhesive has been systematically investigated using differential scanning calorimetry. Samples were isothermally cured at temperatures from 120 to 160/spl deg/C and dynamically cured at ramp rates between 5 and 20/spl deg/C/min. A good agreement between the autocatalytic kinetic model prediction and experimental results was demonstrated. Deviation occurred at high degrees of cure for curing below 140/spl deg/C due to the occurrence of vitrification. Additionally, by comparing the dynamic cure prediction with the isothermal experiment, good agreements and equivalence were demonstrated. As such, it is possible to predict the isothermal reaction behavior of fast cure materials at high temperature provided that the variation between the actual temperature of the heating system and the setting temperature is not large. Furthermore, the effect of curing process on the adhesion strength has been demonstrated by testing the shear strength of lap joint specimens. It was found that the evolution of adhesion strength was largely dependent on the buildup of mechanical properties during the curing process. At low and medium degrees of cure, cohesive and adhesive failures were respectively observed, while at high degrees of cure, adhesion strength surpassing the shear strength of the solder mask was observed. The sharp increase in adhesion strength was observed to coincide with the gelation point marked by the crossover between the storage and loss modulii, thus suggesting that the contributors to adhesion strength include mechanical interlocking as well as chemical bonding, as evidenced by buildup of storage modulus and mechanical strength of the adhesive.

Development of process modeling methodology for flip chip on flex interconnections with non-conductive adhesives

This paper presents a comprehensive methodology to model the assembly process of flip chip on flex interconnections with non-conductive adhesives (NCAs). The methodology combines experimental techniques for material characterization, finite element modeling, and model validation. A non-conductive adhesive has been characterized using several techniques. A unique experimental technique has been developed to measure the cure shrinkage. A 2D axisymmetric finite element model is used for analysis of flip chip on flex package with the non-conductive adhesive (NCA), which takes into account assembly force, cure shrinkage, adhesive modulus buildup, removal of assembly force, and cooling down to room temperature. The relationship between the bump contact resistance and the bump pressure has been established through the development of a dedicated experimental setup, which uses a micro-force tester combined with a digital multimeter and a nano-voltmeter. The process modeling has been validated by comparing the predicted bump contact resistance value and the measured bump contact resistance value after assembly process. The approach developed in this paper can be used to provide guidelines with respect to adhesive material properties, assembly process parameters, and good reliability performances.

Next generation of 100-/spl mu/m-pitch wafer-level packaging and assembly for systems-on-package

According to the latest ITRS roadmap, the pitch of area array packages is expected to decrease to 100 /spl mu/m by 2009. Simultaneously, the electrical performance of these interconnections needs to be improved to support data rates in excess of 10 Gbps, while guaranteeing thermomechanical reliability and lowering the cost. These requirements are challenging, thus, needing innovative interconnection designs and technologies. This paper describes the development of three interconnection schemes for wafer-level packages (WLPs) at 100-/spl mu/m pitch, involving rigid, compliant, and semicompliant interconnection technologies, extending the state of the art in each. Extensive electrical and mechanical modeling was carried out to optimize the geometry of the interconnections with respect to electrical performance and thermomechanical reliability. It was found that the requirements of electrical performance often conflict with those of thermomechanical reliability and the final optimum design is a tradeoff between the two. For the three interconnection schemes proposed, it was found that the electrical requirements can be met fairly well but acceptable mechanical reliability may require organic boards with a coefficient of thermal expansion of 10 ppm/K or lower.

Thermal design of heat spreader and analysis of thermal interface materials (TIM) for multi-chip package

Industry demand for high power multi-chip packages is increasing to realize multifunctional compact systems. In line with industry requirements a multi-chip package suitable for high performance devices is developed. The package has 1296 I/Os. It is capable of handling 2 GHz signal speed and dissipating 75 W power with an external thermal solution. A concurrent design approach is adopted for the package design. Electrical, thermal, structural issues and assembly, and materials limitations are considered in developing this package. Package level thermal design challenges involve optimization of package structure and selection of stable thermal interface material. As a part of this project, a simulation model of the package along with the external thermal solution is developed and validated by measurements. The optimized heat spreader has been designed by performing a parametric study with the validated model. The type of thermal interface material (TIM) suitable to the package has also been identified by measurements. Desired thermal performance of the package has been achieved through design optimization of the package and selection of suitable TIM. Thermal modeling and measurement methodologies, validation and parametric study results are presented in the paper. Analysis of TIMs and measured thermal performance results of packages assembled with different type of TIMs are also discussed in the paper.

Effects of anisotropic conductive adhesive (ACA) material properties on package reliability performance [flip-chip interconnects]

Solder alternative technologies for flip-chip interconnections are fast emerging due to the drive for environmental friendly processes. The anisotropic conductive adhesive (ACA) is one promising solder alternative candidate that shows potential for further pitch reduction. The main concern with ACA interconnection is their long-term reliability performance especially in humid environments. Although much work has been published on ACA joint behaviour, studies on correlation of material properties with reliability performance is still lacking. The main objective in this study was to identify the impact of material properties on reliability, so as to engineer highly reliable microelectronics assemblies. Four representative ACA materials (both film and paste types) with diverse properties were selected and reliability tests were carried out. Correlation analysis identified key material properties that contribute to good reliability performance. Findings indicate that the best properties for high reliability assemblies are: high adhesion strength after subjecting to reliability test conditions, low coefficient of moisture expansion and low storage modulus.