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Dive into the research topics where E. Liniger is active.

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Featured researches published by E. Liniger.


Applied Physics Letters | 2002

Reduced electromigration of Cu wires by surface coating

C.-K. Hu; Lynne M. Gignac; Robert Rosenberg; E. Liniger; Judith M. Rubino; Carlos Juan Sambucetti; A. Domenicucci; X. Chen; Anthony K. Stamper

Electromigration in on-chip Cu interconnections with a selective electroless metal coating, CoWP, CoSnP, or Pd, on the top surface of Cu damascene lines has been investigated. The 10–20 nm thick metal cap significantly improves electromigration lifetime by providing protection against interface diffusion of Cu which has been the leading contributor to metal line failure by electromigration.


Journal of Applied Physics | 2003

Relationship between interfacial adhesion and electromigration in Cu metallization

Michael Lane; E. Liniger; J. R. Lloyd

A relationship between the adhesion of a Cu conductor to its surrounding medium, the electromigration drift velocity, and lifetime in a conventional electromigration test has been demonstrated. Lifetime measurements demonstrate that the drift velocity and the activation energy for mass transport along an interface correlate with the measured adhesion energy of the interface as determined by a four-point bending test. The results indicate that a linear relationship is expected between the electromigration activation energy and the intrinsic work of adhesion, which is consistent with a simple model relating the two. The data indicate that interfacial cleanliness and bond character at the interface (i.e., metal/dielectric versus metal/metal bonding) have a significant impact on all measured parameters.


Journal of Applied Physics | 2005

Simple model for time-dependent dielectric breakdown in inter- and intralevel low-k dielectrics

J. R. Lloyd; E. Liniger; Thomas M. Shaw

A simple physical model is applied to time-dependent dielectric breakdown failure in ultralow-k(k=2.3) interlevel dielectrics. The model assumes that failure depends on the probability that an electron will have enough energy to damage the dielectric as it is accelerated in an electric field. It is seen that the characteristic form of the dependence of failure time on voltage or electric field is primarily dependent on the probability of having sufficient energy and not on the precise physical mechanism causing damage. An argument for a log-normal-like failure distribution is also presented.


Microelectronic Engineering | 2003

Reduced Cu interface diffusion by CoWP surface coating

C.-K. Hu; Lynne M. Gignac; Robert Rosenberg; E. Liniger; Judith M. Rubino; Carlos Juan Sambucetti; Anthony K. Stamper; A. Domenicucci; X. Chen

Electromigration in Cu interconnections with a 10-nm thick selective electroless CoWP coating on the top surface of Cu dual damascene lines has been investigated. The grain structures of the lines embedded in SiLK semiconductor dielectric ranged from bamboo-like to polycrystalline. CoWP coated structures exhibited a greatly improved Cu electromigration lifetime which was attributed to a reduction in Cu interface diffusion.


Applied Physics Letters | 2003

Comparison of Cu electromigration lifetime in Cu interconnects coated with various caps

C.-K. Hu; Lynne M. Gignac; E. Liniger; B. Herbst; David L. Rath; Shyng-Tsong Chen; Steffen Kaldor; Andrew H. Simon; Wei-Tsu Tseng

Electromigration in Cu Damascene lines with bamboo-like grain structures, either capped with Ta/TaN, SiNx, SiCxNyHz layers, or without any cap, was investigated. A thin Ta/TaN cap on top of the Cu line surface significantly improves electromigration lifetime when compared with lines without a cap and with lines capped with SiNx or SiCxNyHz. The activation energy for electromigration increased from 0.87 eV for lines without a cap to 1.0–1.1 eV for samples with SiNx or SiCxNyHz caps and to 1.4 eV for Ta/TaN capped samples.


Journal of The Electrochemical Society | 1999

Stress‐Corrosion Cracking of Low‐Dielectric‐Constant Spin‐On‐Glass Thin Films

Robert F. Cook; E. Liniger

Variations in the electrical and mechanical properties of silsesquioxane spin‐on‐glass thin films are examined as a function of curing time and temperature. Particular attention is paid to the trade‐off between producing low‐dielectric‐constant films, suitable for advanced microelectronic interconnection structures, and mechanically stable films, able to withstand semiconductor wafer fabrication processes. Two critical aspects of the mechanical stability of spin‐on glasses are shown to be the positive thermal expansion mismatch with silicon, leading to tensile film stresses, and reactivity with water, leading to susceptibility to stress‐corrosion cracking. An absolute reaction‐rate model is used to predict crack velocity using a deleted‐bond model and fused silica as a basis and is compared with observed steady‐state crack velocities as a function of film thickness and variations in the curing process. An implication is that on curing, the driving force for film fracture, determined by thermal expansion mismatch, increases less rapidly than the fracture resistance, determined by polymerization.


Journal of Applied Physics | 2002

In situ study of void growth kinetics in electroplated Cu lines

E. Liniger; Lynne M. Gignac; C.-K. Hu; Steffen Kaldor

An in situ electromigration apparatus was used to study the kinetics of void growth in unpassivated, electropolated copper damascene lines. Voids were observed to grow by consuming grains in a stepwise fashion, either by grain thinning or by an edge displacement mechanism. Surface diffusion was found to be the primary diffusion path for void growth. In addition, grain boundaries provided a secondary path for copper diffusion in polycrystalline structures and nucleation sites for void growth in bamboo structures. Void growth rate was measured as a function of sample temperature and linewidth using a scanning electron microscope. An electromigration activation energy of 0.9±0.1 eV was determined for the copper voiding process. The effect of linewidth on void growth rate was also investigated and found to be negligible, consistent with a surface-diffusion dominated model for void growth. The in situ apparatus also made it possible to directly correlate changes in electrical resistance with physical changes t...


IEEE Transactions on Device and Materials Reliability | 2005

Electromigration and adhesion

J. R. Lloyd; Michael Lane; E. Liniger; Chao-Kun Hu; Thomas M. Shaw; Robert Rosenberg

It has been demonstrated that, in those instances where electromigration-induced mass transport is dominated by interfacial diffusion, the adhesion at the interface where mass transport is primarily taking place is related to the electromigration flux. Furthermore, it is shown that the cohesive energy of the interface is directly related to the activation energy for diffusion.


international interconnect technology conference | 2007

Impact of Cu microstructure on electromigration reliability

C.-K. Hu; Lynne M. Gignac; B. Baker; E. Liniger; R. Yu; Philip L. Flaitz

The effect of Cu microstructure on electromigration (EM) has been investigated. A variation in the Cu grain size distributions between wafers was achieved by adjusting the wafer annealing process step after Cu electroplating and before Cu chemical mechanical polishing. Void growth morphology was observed by in-situ and ex-situ scanning electron microscope (SEM) techniques. The Cu lifetime and mass flow in samples with bamboo, near bamboo, bamboo-polycrystalline mixture, and polycrystalline grain structures were measured. The introduction of polycrystalline Cu line grain structure in fine lines for the 65 nm node technology and beyond markedly reduced the Cu EM reliability. The smaller Cu grain size distribution resulted in a shorter EM lifetime and a faster mass flow. The EM activation energies for Cu along Cu/amorphous a-SiCxNyHz interface and grain boundary were found to be 0.95 and 0.79 eV, respectively.


international interconnect technology conference | 2007

Chip-Package-Interaction Modeling of Ultra Low-k/Copper Back End of Line

Xio Hu Liu; Thomas M. Shaw; Michael Lane; E. Liniger; B. Herbst; David L. Questad

Ultra low-k (ULK, k=2.4) dielectric has weaker mechanical properties than first generation low-k films (k=3.0). The introduction of ULK into advanced back end of lines (BEOL) presents a significant challenge due to chip package interaction (CPI) where the packaged die is cycled over a temperature range and the resulting stress can cause ULK BEOL delamination. To avoid CPI failure detailed modeling from the package down to the BEOL must be coupled with quantitative material property measurement. In this paper multi-level finite element models have been used to investigate the parameters which drive CPI failure. It is found that the defect size in the BEOL and the package geometry are key drivers for delamination. Finally, this paper presents a detailed example of the utility of modeling to optimize dicing to reduce defect size, and provide targets for crackstop toughness, which has resulted in a successful reliability qualification of the porous SiCOH (k=2.4) for 45 nm BEOL technology with an organic flip-chip package.

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