C.-K. Hu

Mechanisms for microstructure evolution in electroplated copper thin films near room temperature

We present a model which accounts for the dramatic evolution in the microstructure of electroplated copper thin films near room temperature. Microstructure evolution occurs during a transient period of hours following deposition, and includes an increase in grain size, changes in preferred crystallographic texture, and decreases in resistivity, hardness, and compressive stress. The model is based on grain boundary energy in the fine-grained as-deposited films providing the underlying energy density which drives abnormal grain growth. As the grain size increases from the as-deposited value of 0.05–0.1 μm up to several microns, the model predicts a decreasing grain boundary contribution to electron scattering which allows the resistivity to decrease by tens of a percent to near-bulk values, as is observed. Concurrently, as the volume of the dilute grain boundary regions decreases, the stress is shown to change in the tensile direction by tens of a mega pascal, consistent with the measured values. The small ...

Reduced electromigration of Cu wires by surface coating

Electromigration in on-chip Cu interconnections with a selective electroless metal coating, CoWP, CoSnP, or Pd, on the top surface of Cu damascene lines has been investigated. The 10–20 nm thick metal cap significantly improves electromigration lifetime by providing protection against interface diffusion of Cu which has been the leading contributor to metal line failure by electromigration.

Electromigration path in Cu thin-film lines

Electromigration in 0.15–10 μm wide and 0.3 μm thick Cu lines deposited by physical vapor deposition has been investigated using both resistance and edge displacement techniques in the sample temperature range 255–405 °C. For wide polycrystalline lines (>1 μm), the dominant diffusion mechanism is a mixture of grain boundary and surface diffusion, while in narrow lines (<1 μm) the dominant mechanism is surface transport. The activation energy for grain-boundary transport is approximately 0.2 eV higher than that of surface transport.

Copper interconnections and reliability

Abstract The materials, processes, and reliability issues in the development of multi-level Cu chip interconnections are described. Fully integrated four-level Cu/polyimide structures have been fabricated by using a damascene process which maintains planarity at each level. Electromigration lifetime for two-level Cu interconnections is found to be more than two orders of magnitude longer than that of Al(Cu) while having approximately twice the conductivity.

Copper Interconnection Integration and Reliability

Abstract A processing sequence to produce a multilevel Cu/polyimide structure which is stable in a corrosive environment is described. Using a combination of dry etching and chemical-mechanical polishing, a fully planarized Cu/polyimide wiring structure was obtained. This technology has been successfully applied to the fabrication of 64 kb complementary metal-oxide-semiconductor static random access memory (CMOS SRAM) chips. Chip functionality was not affected by 12 thermal cycles from 20 to 400 °C. The electromigration activation energy for evaporated Cu, Cu(Mg), Cu(Zr), Cu(Sn) and chemical vapour deposition (CVD) pure Cu was evaluated using a drift velocity technique. The mass transport rates of CVD Cu and evaporated Cu were found to be essentially the same, with an electromigration activation energy of 0.70 ± 0.05 eV. An Mg impurity in Cu enhances the electromigration damage rate in Cu, while Sn and Zr drastically increase the Cu electromigration failure lifetime.

Electromigration in Al(Cu) two‐level structures: Effect of Cu and kinetics of damage formation

The electromigration characteristics and kinetics of damage formation for Al(Cu,Si) line segments on a continuous W line and Al(Cu)/W two‐level interconnect structures have been investigated. The mass transport as a function of temperature was measured using a drift‐velocity technique. The flux divergence at the line/stud contact was found to be responsible for formation of open failure in the interconnect structure, as shown by a direct correlation observed between mass depletion at the contact and resistance increase of the line/stud chain. The depletion of Al at the stud contact is preceded by an incubation period during which Cu is swept out a threshold distance from the cathode of the line. This leads to a damage formation process which is controlled by both Cu electromigration along grain boundaries and dissolution of the Al2Cu precipitates. This is distinctly different from single‐level interconnects measured using a conventional electromigration test site. Measurements of the mean failure lifetime...

In situ scanning electron microscope comparison studies on electromigration of Cu and Cu(Sn) alloys for advanced chip interconnects

A high‐resolution in situ SEM (scanning electron microscope) has been configured for real time comparison studies of the electromigration characteristics of Cu and Cu(Sn) alloys. Drift velocity test structures were fabricated and used to simulate the Cu line/W via structure in the multilevel interconnects. Electromigration comparison testings were carried out over a temperature range of 250 to 450 °C and current density of 5×105 to 2.1×106 A/cm2. Under these test conditions, the measured electromigration activation energy for Cu, Cu(0.5 wt %Sn), Cu(1.0 wt % Sn), and Cu(2 wt % Sn) are 0.73, 0.95, 1.25, and 1.14 eV, respectively. The measured critical length for Cu and Cu(Sn) alloys are ≂2.5 μm at a current density of 2.1×106 A/cm2. The observed average drift velocity of Cu mass transport in Cu(Sn) alloys changes with the depletion of Sn atoms which were also found to move in the direction of electron current. Eventually, the Cu mass transport rate reaches a value comparable to that in pure copper test stri...

Electromigration-induced stress in aluminum conductor lines measured by x-ray microdiffraction

Electromigration-induced stress distributions in 200 μm long, 10 μm wide aluminum conductor lines in 1.5 μm SiO2 passivation layers have been investigated in real time using synchrotron-based white-beam x-ray microdiffraction. The results show that a steady-state linear stress gradient along the length of the line developed within the first few hours of electromigration and that the stress gradient could be manipulated by controlling the magnitude and the direction of the current flow. From the current density dependence of the steady-state stress gradient, the effective valence Z* was determined to be 1.6 at 260 °C. From the time dependence of the transient-state stress gradient, the effective grain boundary diffusion coefficient Deff was estimated to be 8.2×10−11 cm2/s at 260 °C using Korhonen’s stress evolution model [M. A. Korhonen, P. Bo/rgesen, K. N. Tu, and C.-Y. Li, J. Appl. Phys. 73, 3790 (1993)]. Both Z* and Deff values are in good agreement with the previously reported values.

Reduced Cu interface diffusion by CoWP surface coating

Electromigration in Cu interconnections with a 10-nm thick selective electroless CoWP coating on the top surface of Cu dual damascene lines has been investigated. The grain structures of the lines embedded in SiLK semiconductor dielectric ranged from bamboo-like to polycrystalline. CoWP coated structures exhibited a greatly improved Cu electromigration lifetime which was attributed to a reduction in Cu interface diffusion.

Sub‐μm, planarized, Nb‐AlOx‐Nb Josephson process for 125 mm wafers developed in partnership with Si technology

We have demonstrated a new planarized all‐refractory technology for low Tc superconductivity (PARTS). With the exception of the Nb‐AlOx‐Nb trilayer preparation, the processing is done almost exclusively within an advanced Si technology fabrication facility. This approach has allowed us to leverage highly off of existing state‐of‐the‐art lithography, metal etching, materials deposition, and planarization capabilities. Using chemical‐mechanical polish as the planarization technique we have fabricated Josephson junctions ranging in size from 0.5–100 μm2. Junction quality is excellent with the figure of merit Vm typically exceeding 70 mV. PARTS has yielded fully functional integrated Josephson devices including magnetometers, gradiometers, and soliton oscillators.