Eckhard Langer

In situ SEM observation of electromigration phenomena in fully embedded copper interconnect structures

An experimental set-up is presented, that allows in situ scanning electron microscope (SEM) investigations of the progress of electromigration damage in fully embedded copper interconnect structures. A LEO Gemini 1550 SEM has been equipped with a heating stage and electrical connections for the experiment. The studied interconnect structures are usually used for reliability testing in electromigration ovens. These test structures are located within the scribelines of wafers. Therefore, they allow the characterization of the electromigration behaviour of products on the wafer. To enable the SEM observation, focused ion beam (FIB) was used to prepare cross-sections of the samples maintaining their electrical functionality. Thereby, a thin layer of passivation was left over in front of the interconnects to keep them fully embedded. The SEM images which were taken at an angle of 60° allow the observation of both the entire via/contact and the connecting lines. Multiple images were recorded during the degradation experiments. The resulting video sequences provide a good visualization of the formation, growth and motion of voids at the stressed interconnects. The dominant diffusion path has been identified.

Effect of mass transport along interfaces and grain boundaries on copper interconnect degradation

In-situ SEM electromigration studies were performed at fully embedded via/line interconnect structures to visualize the time-dependent void evolution in inlaid copper interconnects. Void formation, growth and movement, and consequently interconnect degradation, depend on both interface bonding and copper microstructure. Two phases are distinguished for the electromigration-induced interconnect degradation process: In the first phase, agglomerations of vacancies and voids are formed at interfaces and grain boundaries, and voids move along weak interfaces. In the second phase of the degradation process, they merge into a larger void which subsequently grows into the via and eventually causes the interconnect failure. Void movement along the copper line and void growth in the via are discontinuous processes, whereas their step-like behavior is caused by the copper microstructure. Directed mass transport along inner surfaces depends strongly on the crystallographic orientation of the copper grains. Electromigration lifetime can be drastically increased by changing the copper/capping layer interface. Both an additional CoWP coating and a local copper alloying with aluminum increase the bonding strength of the top interface of the copper interconnect line, and consequently, electromigration-induced mass transport and degradation processes are reduced significantly.

Physical failure analysis in semiconductor industry—challenges of the copper interconnect process

Abstract Since the copper interconnect dimensions shrunk continuously, physical failure analysis becomes increasingly important for process optimization. Failure localization and defect analysis in interconnect structures as well as analysis of barrier/seed step coverage are challenges of the copper inlaid technology. Failure localization in via chain test structures using voltage contrast analysis with SEM/FIB tools and OBIRCH and subsequent destructive failure analysis using FIB/SEM and TEM are described. The inspections of voids in copper interconnects and of buried residuals in vias are typical tasks for process monitoring, which make the application of leading-edge analytical techniques necessary. Barrier/seed step coverage analysis at via chains challenges both TEM sample preparation and analysis. 3D object reconstruction by electron tomography is a promising future method for this task.

Investigation of the Influence of the Local Microstructure of Copper Interconnects on Void Formation and Evolution during Electromigration Testing

The electromigration‐induced void evolution has been investigated in‐situ on fully embedded inlaid copper test structures inside a SEM, utilizing the method described in [1]. After the failure of the test structure or after significant voiding had been observed the cathode via region of the samples was prepared for subsequent TEM and/or EBSD analysis in order to reveal the position of grain boundaries and the orientations of the grains in the neighborhood of a void. It was confirmed that intersections of grain boundaries with interfaces of the interconnect lines or clusters of small grains can act as nucleation sites for initial void formation or as trapping sites on which voids can be stopped. Furthermore, it was found that for interconnects with strengthened top interface, where the diffusion rate is significantly lower due to the changed chemical bonding, that the void movement occurs mainly along the copper/liner interface. Such interconnects show significantly longer lifetimes. In this paper, local a...

Process Control and Physical Failure Analysis for Sub-100NM CU/Low-K Structures

For successfully developing and controlling BEoL structures of the 32 nm CMOS technology node and beyond, advanced analytical techniques are needed for process development and control, for physical failure localization and analysis as well as for the investigation of reliability-limiting degradation mechanisms. These challenges are discussed from the point of view of a high volume leading-edge manufacturing.

Microstructure Effect on Electromigration‐Induced Degradation of Inlaid Copper Interconnects

Electromigration‐induced degradation processes in via/line dual inlaid copper interconnect test structures are discussed based on experimental studies. Void formation, growth and movement, and consequently interconnect degradation, depend on both interface bonding and copper microstructure. Void movement along the copper line and void growth in the via are discontinous processes, wherein their step‐like behavior is caused by copper microstructure. Microstructure studies and microstructure monitoring are becoming more important for strengthened top interfaces of copper lines, e. g. by local alloying of the copper or by applying an additional coating on top of the polished copper lines. As a result of this interface engineering, the contribution of grain boundary diffusion becomes increasingly important for the directed mass transport and for electromigration‐induced degradation.

Electromigration-induced copper interconnect degradation and failure: the role of microstructure

In this paper, EM-induced degradation processes and failure in on-chip interconnects are discussed based on experimental studies. In-situ microscopy studies at embedded via/line dual inlaid copper interconnect test structures show that void formation and evolution depend on both interface bonding and microstructure. In future, copper microstructure becomes more critical for interconnect reliability since grain boundary diffusion becomes increasingly important for structures with strengthened interfaces, i. e. interfaces are the fastest pathways for the EM-induced mass transport any more. Particularly, grain boundaries have to be considered as significant pathways for mass transport in copper interconnects.

Failures in copper interconnects-localization, analysis and degradation mechanisms

In this paper, we focussed about the failures in copper interconnects and on analytical techniques that are applied for physical failure analysis. Electromigration test structure after partial degradation by voiding was observed using SEM images.