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Edward Aung

Altera

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Publication

Featured researches published by Edward Aung.

Archive | 2001

Clock data recovery circuitry associated with programmable logic device circuitry

Edward Aung; Henry Lui; Paul Butler; John E. Turner; Rakesh H. Patel; Chong Lee

Archive | 1999

Phase-locked loop circuitry for programmable logic devices

Chiakang Sung; Robert Bielby; Richard G. Cliff; Edward Aung

Archive | 2002

Clock loss detection and switchover circuit

Gregg Starr; Edward Aung

Archive | 2002

Phase locked loop (PLL) and delay locked loop (DLL) counter and delay element programming in user mode

Gregory Starr; Richard Yen-Hsiang Chang; Edward Aung

Archive | 2002

CLOCK LOSS DETECTION CIRCUIT AND CORRESPONDING METHOD

Greg Starr; Edward Aung

Archive | 2009

System and method for confirming clock loss

Greg Starr; Edward Aung

Archive | 2009

Clock loss detection system and method

Greg Starr; Edward Aung

Archive | 2002

Schaltung zur detektion eines taktsignalverlusts und verfahren dazu

Greg Starr; Edward Aung

Archive | 2002

Schaltung zur detektion eines taktsignalverlusts und zur umschaltung von taktsignalen

Edward Aung; Greg Starr

Archive | 2001

Taktrückgewinnungsschaltung mit programmierbarer Logikschlaltung

Edward Aung; Henry Lui; Paul Butler; John E. Turner; Rakesh H. Patel; Chong Lee

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Collaboration

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Greg Starr

Altera

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Chong Lee

Altera

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Henry Lui

Altera

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John E. Turner

Altera

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Paul Butler

Altera

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Rakesh H. Patel

Altera

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Chiakang Sung

Altera

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Gregg Starr

Altera

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Gregory Starr

Altera

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Richard G. Cliff

Altera

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