Enrico Orietti

Analysis of multi-phase LLC resonant converters

In this paper a topology for multi-phase interleaved LLC resonant converter is presented. The proposed solution, based on three LLC modules with transformer primary windings star connection allows to drastically reduce the output current ripple and consequently to minimize the output filter capacitor size. Differently from other multi-phase solutions, that are greatly susceptible to resonant component mismatch and consequently can be affected by a considerable current imbalance among modules, the proposed topology exhibits an inherent balancing capability. Small-signal analysis is presented and the possibility to turn-off one or two modules (phase shedding) at reduced output current levels is discussed, highlighting the trade-off between converter efficiency and output capacitor current ripple reduction. Measurements on a prototype will be included in the paper as validation of assertions and proposals.

Reducing the EMI Susceptibility of a Kuijk Bandgap

In this paper, the susceptibility of a Kuijk bandgap voltage reference to electromagnetic interferences (EMIs) superimposed to the power supply is investigated. A model of the bandgap circuit is derived from experimental tests consisting of scattering parameters and susceptibility measurements on a test chip. The model is able to correctly predict the susceptibility of the circuit by means of SPICE transient simulations. The simulations identify the fundamental stray components responsible for EMI coupling that are usually not taken into account in postlayout analyses. From the EMI point of view, the rectification phenomenon of bipolar transistors, used in the bandgap cell, and the operational amplifier (op-amp) input distortion are shown to cause the voltage reference performance degradation. In particular, for the first time, the importance of the bandgap cell is pointed out, suggesting that the measures to reduce the susceptibility of the op-amp may not be sufficient to guarantee the bandgap immunity. Moreover, the analyses of main parasitic paths (from the power supply net to the more sensitive nodes) demonstrate the relevance of paths that are not commonly considered during the design phase and that may lead to an immunity degradation. Possible solutions to reduce the bandgap susceptibility are also explored, suggesting design criteria, filtering techniques, and layout variations. A second test chip is designed and manufactured to validate the suggested improvements and verify the critical role of the bandgap cell. Finally, a simplified theoretical analysis, which allows a fast bandgap susceptibility evaluation, is presented. This tool is used to point out the importance of the rectification phenomenon compared to the op-amp differential pair distortion.

Fully-digital hysteretic voltage-mode control for dc-dc converters based on asynchronous sampling

This paper investigates a fully-digital fixed frequency digital voltage-mode controller for DC-DC converters based on hysteresis modulation. The proposed architecture employes a digital-pulse width modulator (DPWM) and an analog-to-digital converter (ADC) based on a threshold inverter quantization (TIQ) technology, which enables flash-based analog-to-digital conversion and asynchronous detection of output voltage variations. One important property of the proposed solution is the high dynamic performance, since the control algorithm is based on the emulation of a hysteretic voltage mode control and on the asynchronous detection of the output voltage variations, which reduces control delay. An IC design of the TIQ-based ADC, tailored to DC-DC converters, and of a DPWM with time resolution down to 350 ps is also reported. Simulation and experimental results on a synchronous buck converter confirm the proposed analysis and the dynamic performances achievable by the proposed control architecture.

A simple mixed-signal MPPT circuit for photovoltaic applications

The paper proposes a mixed-signal circuit approach for the Maximum Power Point Tracking (MPPT) for interfacing photovoltaic (PV) panels with batteries or inverters connected to the utility grid. The proposed circuit is aimed to a low cost single-chip IC implementation and it is based on the incremental conductance method, widely used in the literature when more complex microcontrollers or DSPs are used. Analog-to-Digital Converters (ADC) or Digital to Analog Converters (DAC) are avoided and the digital logic is reduced to a few elementary operations (a XOR port, a flip-flop and a counter). The analog part of the circuit implements most of the MPPT algorithm by exploiting the linear region of a field-effect transistor to measure and to store the absolute conductance of the operating point, and by using few analog switches, operational amplifiers and a comparator, to elaborate, after the duty-cycle perturbation, the value of the incremental conductance and to compare it with the absolute one. The digital logic imposes the timing of the different phases and the direction of the search algorithm. Simulation and experimental results on a 35W PV panel, when a high-frequency dc-dc boost converter is employed as a MPP tracker, verify the validity and effectiveness of the proposed solution.

A discussion of the susceptibility of a brokaw bandgap to EMI

In this paper, the susceptibility of a Brokaw bandgap voltage reference towards Electromagnetic Interferences (EMI) superimposed to the power supply is investigated. The attention is focused on the bandgap cell itself, verifying that it is the main responsible for the device malfunction when radio frequency noises are injected in the chip through the supply rail. In particular, the rectification phenomena of bipolar transistors, used in the bandgap cell, are proved to cause the voltage reference performance degradation. Some possible hints to overcome this problem are also explored, suggesting design modifications, filtering solutions and layout changes. I. INTRODUCTION

Electromagnetic Susceptibility Analysis on a Digital Pulse Width Modulator for SMPSs

In this paper, a digital pulse width modulator (DPWM) is analyzed from the point of view of susceptibility to radio-frequency interference (RFI). The chosen DPWM architecture is based on the hybrid delay-line/counter scheme commonly used in the digital control of switched-mode power supplies (SMPSs). This paper focuses on the DPWM performance degradation in the presence of electromagnetic interference (EMI), and for this purpose a DPWM with time resolution down to 350 ps has been designed and manufactured in a standard 0.35- mum complementary metal-oxide semiconductor technology. Measurements and analytical analyses are presented for both EMI effects on the internal generated clock signal and on the PWM duty-cycle precision. The immunity degradation mechanisms are investigated by means of an analytical approach, demonstrating that the PWM susceptibility is more strictly related to its functional design rather than to the implemented topology. The effects of clock and duty-cycle jitter induced by RFIs are finally verified using a simulation model on a digitally controlled buck converter, highlighting the importance of such issue on steady-state performances of SMPSs.