Eugene Y.-J. Kong

Toward Conformal Damage-Free Doping With Abrupt Ultrashallow Junction: Formation of Si Monolayers and Laser Anneal as a Novel Doping Technique for InGaAs nMOSFETs

New doping techniques are needed for the formation of abrupt, ultrashallow junctions with high doping concentration in the source/drain or source/drain extension regions of metal-oxide-semiconductor field-effect transistors (MOSFETs) at advanced technology nodes. In addition, 3-D device structures, such as fin field-effect transistors, require a good doping conformality. In this paper, the formation of monolayers of silicon on InGaAs by disilane or silane treatment of the InGaAs surface is studied as a conformal dopant source that does not introduce ion implant damage into the InGaAs, and laser anneal is used to drive in and activate the dopants to form an ultrashallow and very abrupt n++-junction. This novel doping technique is first demonstrated in planar InGaAs MOSFETs.

Self-Aligned and Non-Self-Aligned Contact Metallization in InGaAs Metal–Oxide-Semiconductor Field-Effect Transistors: A Simulation Study

2-D simulations were performed to compare the drive currents of In0.53Ga0.47As n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with self-aligned contact metallization and those with non-self-aligned contact metallization in order to determine the importance of self-aligned contact metallization in InGaAs MOSFETs at advanced technology nodes. A gate length of 15 nm was simulated, and various gap sizes between the via and the gate and various contact resistivities between the contact and the source/drain (S/D) were investigated. While very small gap sizes can significantly lower the S/D resistance for non-self-aligned contact metallization by bringing the via very close to the gate, an important benefit is still provided by self-aligned contact metallization in terms of contact area, allowing self-aligned contact metallization to outperform non-self-aligned contact metallization for the same contact resistivity, down to very low contact resistivity in the order of 10-9 Ω·cm2.

P 2 S 5 /(NH 4 ) 2 S x -Based Sulfur Monolayer Doping for Source/Drain Extensions in n-Channel InGaAs FETs

Ultrashallow junctions that are abrupt and have low resistance are needed for the source/drain extensions (SDEs) of MOSFETs at future technology nodes. In addition, the use of 3-D devices, such as FinFETs or nanowire FETs, will require a doping process that is conformal. In this paper, we discuss P2S5/(NH4)2Sx-based doping for potential use in the formation of SDEs for n-channel InGaAs FETs. MOSFETs with source and drain formed using this doping technique are demonstrated. The effect of the dopant activation step on device performance is also studied.

Pd-InGaAs as a new self-aligned contact material on InGaAs

Introduction. Self-alignment of source/drain (S/D) contacts to the transistor gate is important, as it brings the S/D contacts close to the channel and allows the achievement of low parasitic S/D series resistance RSD. Low RSD is needed for high-mobility and short-channel transistors where the channel resistance is low and external resistance is a significant proportion of the total resistance between source and drain. Fig. 1 illustrates the self-aligned S/D contact metallization process for InGaAs transistors. Recently, the first self-aligned Ni-InGaAs S/D contacts were demonstrated.1, 2 In this work, Pd-InGaAs is explored as a new self-aligned contact metallization technology.

Plasma Doping of InGaAs at Elevated Substrate Temperature for Reduced Sheet Resistance and Defect Formation

Plasma doping (PLAD), a high-throughput ion implantation technique capable of achieving ultrashallow junctions and conformal doping of 3-D structures such as fin field-effect transistors, is investigated as an alternative to conventional beam-line ion implantation for InGaAs at advanced technology nodes. The PLAD at an elevated substrate temperature (ET-PLAD) is studied and reported for InGaAs for the first time. The ET-PLAD can give lower sheet resistance than room-temperature PLAD due to enhanced dopant incorporation. More crucially, an ET can help to prevent amorphization. After dopant activation anneal, residual corner defects are observed in small fins that are amorphized during plasma ion implantation, whereas fins that remain crystalline during plasma ion implantation are free of corner defects.

Co-InGaAs as a novel self-aligned metallic source/drain material for implant-less In 0.53 Ga 0.47 As n-MOSFETs

Introduction. In x Ga 1−x As is an attractive channel material to replace Si in future generations of n-MOSFETs due to its high electron mobility. Self-aligned contact metallization is needed to realize low parasitic series resistance. Recently, Ni-InGaAs self-aligned contact metallization was reported for InGaAs n-MOSFETs.1, 2 In general, metal-InGaAs compounds could be used as self-aligned contact materials and possibly as source/drain (S/D) materials. In this work, we report the first demonstration of implant-less In 0.53 Ga 0.47 As n-MOSFETs with metallic S/D formed by self-aligned Co-InGaAs metallization technology.

Germanium/Ni-InGaAs Solid-State Reaction for Contact Resistance Reduction on n + In 0.53 Ga 0.47 As

We report the first demonstration of solid state reaction between Ge and Ni-InGaAs to form mono nickel germanide contact on n In0.53Ga0.47As. This reaction was performed by isochronous annealing of Ge on Ni-InGaAs at temperatures ranging from 400 to 600 ̊C in N2 ambient. Detailed materials study on the reaction mechanism is described here. Compared with Ni-InGaAs contact, more than 60% reduction in contact resistance on n-In0.53Ga0.47As was achieved using this new contact formation scheme. INTRODUCTION High mobility III-V compound semiconductors are attractive candidates to replace strained Si channel for future high performance logic applications [1]-[4]. To realize the full potential of III-V MOSFETs, S/D engineering to achieve low series resistance RSD is required. A self-aligned metallization analogous to the salicide process in Si CMOS technology is desired for deeply scaled III-V MOSFETs. In this regard, Ni-InGaAs compound has been reported as a promising self-aligned contact for InGaAs MOSFETs [5]-[7]. However, these contacts suffer from high contact resistance RC which severely degrades device performance at small gate length. Therefore, RC needs to be reduced. In this paper, we report the demonstration of significant RC reduction for Ni-InGaAs contact through the solid state reaction of Ge and Ni-InGaAs. This was achieved by annealing the material stacks and mono nickel germanide is formed on a layer of solid phase regrown InGaAs. DEVICE DESIGN AND FABRICATION 2” p-type InP wafers were used as starting substrates, on which a 1 μm p-type In0.53Ga0.45As (Be-doped, doping concentration NA of 2×10 16 cm) was grown. Si ion implant (1×10 cm at 25 keV and 1×10 cm at 70 keV) and mesa etching was done to form n InGaAs well for forming transfer length method (TLM) test structures. Active contact regions were opened by Photoresist (PR) patterning. Ni (~30nm) was deposited and lift-off was done to form contact pads. The 1 Rapid Thermal Anneal (RTA) at 250 ̊C for 30 s forms Ni-InGaAs contact on the n-InGaAs well. The complete process flow for TLM device fabrication is illustrated in Fig. 1(a). The key steps to form NiGe contact is illustrated in Fig. 1(b) where Ge (~70 nm) was evaporated on the Ni-InGaAs pad by lift-off after a 1 min DHF (HF:H2O=1:100) clean. The process was completed by the 2 annealing at various temperatures for 10s. Blanket samples were also prepared for the study of the solid state reaction between Ge and Ni-InGaAs at temperatures ranging from 300 ̊C to 600 ̊C. RESULTS AND DISCUSSION The Secondary Ion Mass Spectroscopy (SIMS) analysis in Fig. 2 shows the elemental distributions of Ni and Ge for as-deposited sample and annealed samples. Similar to as-deposited sample, there is little reaction between Ge and Ni-InGaAs at 300 ̊C as seen from the sharp interface between Ge and Ni signal. However, after 400 ̊C anneal, Ge intermixes with Ni to form a layer of NiGe compound. Therefore, we further studied samples annealed above 300 ̊C in TLM samples. Fig. 3 shows the sheet resistance measured by micro-four-point-probe. The sheet resistance of formed metal layer reduces dramatically after thermal annealing compared with NiInGaAs. TLM test structures were used to evaluate the contact resistance. Fig. 4(a) plots the total resistance versus contact spacing between two adjacent pads. RC for each split is statistically summarized by the box chart in Fig. 5. The control is Ni-InGaAs samples without Ge deposition. On the average, RC is reduced by 64% for samples annealed at 600 ̊C for 10 s. Fig. 6 shows the SIMS signals for samples annealed at 400 ̊C. From the Ge and Ni distributions, it is clear that the top layer consists of a nickel-germanium compound and the sublayer is unconsumed Ni-InGaAs alloy. This was also confirmed by the cross-sectional TEM images of the formed layer in Fig. 7. Fig. 7(b) is the magnified view of the contact materials with EnergyDispersive X-Ray Spectroscopy (EDX) results labeled, showing two metal layers: a top NiGe layer (~66 nm) over a Ni-InGaAs layer (~27 nm). ~24 nm InGaAs regrew at this anneal temperature. It is calculated that the Ge/Ni-InGaAs reaction ratio is around 1.94~2.36. Fig. 8 shows that at 600 ̊C, Ge fully consumes the Ni-InGaAs to form only NiGe on top. TEM images of this condition in Fig. 9 show that the NiGe (~57 nm) layer and the solid phase regrown InGaAs (~49 nm) below the contact material. The NiGe film is continuous and smooth though interface over growth of NiGe was observed at a few spots. Phase identification was carried out using X-Ray diffraction (XRD) in θ-2θ geometry. The XRD spectra in Fig. 10 for annealed samples shows that, for annealing temperatures above 400 ̊C, mono nickel germanide is the dominant phase formed. The surface morphology was characterized by Scanning Electron Microscope (SEM) (Fig. 11). Relatively smooth surface was observed for 400 ̊C and 600 ̊C, while the 500 ̊C sample has a rougher surface. Table I is a summary of the two contact schemes. The novel contact scheme in this work shows superior properties to that of Ni-InGaAs. Future work is needed to integrate this contact technology into InGaAs nMOSFETs in a self-aligned manner. CONCLUSION Solid state reaction between Ge and Ni-InGaAs was demonstrated for the first time on In0.53Ga0.47As substrate. Electrical data from TLM structures shows significant RC reduction. The reaction starts at temperatures above 300 ̊C. The contact material formed is found to be mono nickel germanide. Solid phase regrowth of InGaAs was also observed during the reaction. This novel contact formation scheme could be a promising self-aligned contact for InGaAs nMOSFETs. ACKNOWLEDGEMENT. Support from H.-Y. Lin, C.-H. Ko and C. Wann of TSMC is acknowledged. REFERENCES [1] M. Radosavljevic et al., IEDM Tech. Dig, pp. 126, 2010. [2] R. J. W. Hill et al., IEDM Tech. Dig, pp. 130, 2010. [3] A. Ali. et al., IEDM Tech. Dig, pp. 134, 2010. [4] A. Nainani et al., IEDM Tech.. Dig., pp. 138, 2010. [5] X. Zhang et al., ESL, vol. 14, no. 2, pp. H60, 2011. [6] S. H. Kim et al., IEDM Tech. Dig., pp. 596, 2010. [7] X. Zhang et al., ESL, vol. 14, no. 5, pp. H212, 2011. -608Extended Abstracts of the 2011 International Conference on Solid State Devices and Materials, Nagoya, 2011, pp608-609 A-8-5