F. Benkhelifa

First polarization-engineered compressively strained AlInGaN barrier enhancement-mode MISHFET

One current focus of research is the realization of GaN-based enhancement-mode devices. A novel approach for the realization of enhancement-mode behaviour is the utilization of polarization matching between the barrier and the GaN buffer. Yet, the utilization of a quaternary barrier combining polarization engineering together with a large conduction band offset has not been demonstrated so far. Here, epitaxially grown, compressively strained AlInGaN is applied as a nearly polarization-matched barrier layer on GaN resulting in enhancement-mode operation. The insulated-gate devices are fabricated gate-first with Al2O3 as gate dielectric. Passivated metal insulator semiconductor heterostructure field effect transistors yielded threshold voltages (Vth) of up to +1 V. The devices withstand negative and positive gate-biased stress and a positive Vth is maintained even after long-time negative bias stress.

InP-based DHBT technology for high-speed mixed signal and digital applications

We report on an InP DHBT-based technology featuring current gains of ∼ 90, breakdown voltages of ≫ 4.5 V and cut-off frequency (fT) values of ≫ 300 GHz. Using this technology, state-of-the-art mixed signal integrated circuits, including distributed amplifiers (DAs), multiplexers (MUX) / demultiplexers (DEMUX), and clock and data recovery (CDR) ICs suitable for 100+ Gbit/s applications have been demonstrated. The DA-MMICs achieved gains of ∼ 21 dB, 3-dB bandwidths of ≥ 95 GHz (gain-bandwidth-products ≫ 1 THz), as well as output voltages of up to 3 V at 100 Gbit/s. A monolithically integrated CDR/1:2 DEMUX IC has also successfully been tested at data rates of up to 107 Gbit/s.

Threshold Voltage Engineering in GaN-Based HFETs: A Systematic Study With the Threshold Voltage Reaching More Than 2 V

One of the key challenges for the adoption of gallium nitride (GaN)-based heterostructure field effect transistors (HFETs) in power-switching applications is obtaining enhancement mode behavior. A large variety of methods have been applied to shift the threshold voltage Vth of HFETs. However, most of the time, approaches were discussed individually, neglecting the effects of combinations. Hence, in this paper, a comprehensive study of four different approaches to shift Vth well into the positive range is presented. We show the effects of different gate metallizations, of a backbarrier, of a gate oxide, and of a gate recess. Each approach is discussed individually, and special focus is on the insulator/semiconductor interface, which is apparently different with and without gate recess. The final device exhibits a Vth of +2.3 V, which is shown to be stable when applying OFF-state stress during dynamic characterization.

Strain control of AlGaN/GaN high electron mobility transistor structures on silicon (111) by plasma assisted molecular beam epitaxy

This paper reports on the use of plasma assisted molecular beam epitaxy of AlGaN/GaN-based high electron mobility transistor structures grown on 4 in. Si (111) substrates. In situ measurements of wafer curvature during growth proved to be a very powerful method to analyze the buffer layer’s thickness dependent strain. The Ga/N ratio at the beginning of growth of the GaN buffer layer is the critical parameter to control the compressive strain of the entire grown structure. An engineered amount of compressive strain must be designed into the structure to perfectly compensate for the tensile strain caused by differences in the thermal expansion coefficient between the epi-layer and substrate during sample cool down from growth temperatures. A maximum film thickness of 4.2 μm was achieved without the formation of any cracks and a negligible bow of the wafers below 10 μm. Measurement of the as-grown wafers revealed depth profiles of the charge carrier concentration comparable to values achieved on SiC substrat...

GaN-on-Si Enhancement Mode Metal Insulator Semiconductor Heterostructure Field Effect Transistor with On-Current of 1.35 A/mm

GaN-on-Si transistors are regarded as a candidate for future power-switching applications. Beside the necessity to achieve enhancement mode behavior, on-resistance and maximum gate voltage are still limited for GaN-based transistors on Si substrate. Here, an enhancement mode metal insulator semiconductor heterostructure field effect transistor on Si substrate with record on-current of 1.35 A/mm and threshold voltage of +0.82 V is demonstrated. The corresponding gate current is still well below 1 mA/mm at 6.5 V gate voltage. By comparison of measured and simulated CV curves, the density of interface states introduced by the insulator is shown to be quasi-independent on etch damage and/or barrier material.

Radiative inter-valley transitions as a dominant emission mechanism in AlGaN/GaN high electron mobility transistors

We report on electroluminescence (EL) emission from AlGaN/GaN high electron mobility transistors (HEMTs). Intensity maxima at the drain-side edge of the gate foot and at the drain-side edge of the gate field plate are observed. To relate the EL intensity profile to the electric field along the channel, 2D device simulations have been performed at different drain biases. The dependences of both EL maxima on the electric field reveal a threshold which closely correlates with the electric field strength at which a transfer of conduction band electrons from the zone centre minimum to satellite valleys sets in. We further analyze the dependence of the EL spectra on the drain voltage. The obtained results strongly suggest that the EL emission observed in AlGaN/GaN HEMTs is dominated by radiative inter-valley electron transitions.

Benchmarking of Large-Area GaN-on-Si HFET Power Devices for Highly-Efficient, Fast-Switching Converter Applications

This work reports the development and fabrication of large area AlGaN/GaN-on-Si HFETs for the use in highly-efficient fast-switching power converters. High performance is demonstrated by full characterization of static- and dynamic-parameters and a direct comparison to two commercial state-of-the-art silicon power devices. Compared to their silicon counterparts the GaN-device achieves by a factor of 3 lower static area specific on-state resistance RON×A, and by a factor of 3 lower static on-state resistance times gate charge product RON×Q. In switching tests the device achieves a low dynamic dispersion and low switching losses. Furthermore in this work a sophisticated measurement setup for characterization of dynamic parameters is developed and demonstrated. Characterization and test conditions are adapted for the use in fast-switching power converter applications.

InP DHBT-based ICs for 100 Gbit/s data transmission

This paper reports state-of-the-art mixed signal ICs, including a distributed amplifier and a multiplexer-core intended for use in 100 Gbit/s optical communication systems (Ethernet). Using a manufacturable InP DHBT technology, exhibiting current gains of >80 and cut-off frequencies (fT and fmax) of >300 GHz, the broadband amplifier achieved a gain of 21 dB and a 3-dB bandwidth of 95 GHz (GxBW>1 THz), whereas, the 2:1 multiplexer-core has been tested at data rates up to 138 Gbit/s.

Charge balancing in GaN-based 2-D electron gas devices employing an additional 2-D hole gas and its influence on dynamic behaviour of GaN-based heterostructure field effect transistors

GaN-based heterostructure FETs (HFETs) featuring a 2-D electron gas (2DEG) can offer very attractive device performance for power-switching applications. This performance can be assessed by evaluation of the dynamic on-resistance Ron,dyn vs. the breakdown voltage Vbd. In literature, it has been shown that with a high Vbd, Ron,dyn is deteriorated. The impairment of Ron,dyn is mainly driven by electron injection into surface, barrier, and buffer traps. Electron injection itself depends on the electric field which typically peaks at the gate edge towards the drain. A concept suitable to circumvent this issue is the charge-balancing concept which employs a 2-D hole gas (2DHG) on top of the 2DEG allowing for the electric field peak to be suppressed. Furthermore, the 2DEG concentration in the active channel cannot decrease by a change of the surface potential. Hence, beside an improvement in breakdown voltage, also an improvement in dynamic behaviour can be expected. Whereas the first aspect has already been de...

Mechanical and electrical properties of plasma and thermal atomic layer deposited Al2O3 films on GaAs and Si

Mechanical and electrical properties of Al2O3 films are compared for plasma-assisted atomic layer deposition (ALD) and thermal ALD on two substrates, GaAs and Si, of different thermal expansion coefficient. Films with stable chemical structure and mechanical residual stress could be produced by both techniques without inducing any damage to sensitive multiquantum-well structures. However, the as-deposited residual stress in the plasma ALD Al2O3 films is lower and decreases, while that in the thermal ALD films increases with the deposition temperature. Moreover, the stress hysteresis observed upon thermal cycles is much lower for the plasma ALD films compared to that for the thermal ALD films. The biaxial elastic modulus (BEM or stiffness parameter) increases with the deposition temperature for both ALD films, being higher for the plasma ALD than that for the thermal ALD at a given temperature. The higher BEM is reflected in better electrical properties of the films. Thus, the leakage current of metal–oxide–semiconductor capacitors with the plasma ALD-Al2O3 film is three orders of magnitude lower and the breakdown voltage 20% higher than that of the capacitors with the thermal ALD film.