Hady Yacoub

The effect of the inversion channel at the AlN/Si interface on the vertical breakdown characteristics of GaN-based devices

GaN-on-Si transistors attract increasing interest for power applications. However, the breakdown behavior of such devices remains below theoretical expectations, for which the Si substrate is typically made responsible. In this work, the effect of the thickness of an aluminum nitride buffer layer on the vertical breakdown voltage, measured relative to a grounded silicon substrate, has been investigated. A voltage-polarity-dependent breakdown mechanism has been observed. It has been found that the breakdown in the positive bias voltage regime is initiated by carrier injection, for which the carriers originate from an inversion channel formed between the epitaxial layers and the p-silicon substrate. TCAD simulations have confirmed the proposed explanations, and suggest that appropriate modification of the electronic structure at the AlN/silicon interface could significantly improve the vertical breakdown voltage.

GaN-on-Si Enhancement Mode Metal Insulator Semiconductor Heterostructure Field Effect Transistor with On-Current of 1.35 A/mm

GaN-on-Si transistors are regarded as a candidate for future power-switching applications. Beside the necessity to achieve enhancement mode behavior, on-resistance and maximum gate voltage are still limited for GaN-based transistors on Si substrate. Here, an enhancement mode metal insulator semiconductor heterostructure field effect transistor on Si substrate with record on-current of 1.35 A/mm and threshold voltage of +0.82 V is demonstrated. The corresponding gate current is still well below 1 mA/mm at 6.5 V gate voltage. By comparison of measured and simulated CV curves, the density of interface states introduced by the insulator is shown to be quasi-independent on etch damage and/or barrier material.

Effect of stress voltage on the dynamic buffer response of GaN-on-silicon transistors

Back-gated measurements on conductive silicon substrates have been performed to investigate the effect of stress voltage on the dynamic behaviour of GaN-on-silicon (GaN-on-Si) transistors. Two comparable samples were studied with the only difference being the vertical dislocation density. Results show a clear correlation between dislocation density and the ability of the GaN buffer to dynamically discharge under high stress conditions.

Effect of Different Carbon Doping Techniques on the Dynamic Properties of GaN-on-Si Buffers

The effect of different carbon doping techniques on the dynamic behavior of GaN-on-Si buffer was investigated. Intentional doping using a hydrocarbon precursor was compared with the more common autodoping technique. Breakdown and dynamic behavior of processed devices indicate that extrinsic carbon doping delivers better dynamic properties for the same blocking voltage capabilities. Modeling and simulations have revealed that charge transport across the GaN buffer is the main limiting factor during the buffer discharge process.

Limitations of threshold voltage engineering of AlGaN/GaN heterostructures by dielectric interface charge density and manipulation by oxygen plasma surface treatments

The interface charge density between the gate dielectric and an AlGaN/GaN heterostructure has a significant impact on the absolute value and stability of the threshold voltage Vth of metal-insulator-semiconductor (MIS) heterostructure field effect transistor. It is shown that a dry-etching step (as typically necessary for normally off devices engineered by gate-recessing) before the Al2O3 gate dielectric deposition introduces a high positive interface charge density. Its origin is most likely donor-type trap states shifting Vth to large negative values, which is detrimental for normally off devices. We investigate the influence of oxygen plasma annealing techniques of the dry-etched AlGaN/GaN surface by capacitance-voltage measurements and demonstrate that the positive interface charge density can be effectively compensated. Furthermore, only a low Vth hysteresis is observable making this approach suitable for threshold voltage engineering. Analysis of the electrostatics in the investigated MIS structures...

The effect of AlN nucleation growth conditions on the inversion channel formation at the AlN/silicon interface

In recent years, GaN grown on silicon substrates (GaN-on-Si) managed to offer a commercial solution for harvesting the advantages of GaN-based devices whilst benefiting from the well-established silicon-based infrastructure. Although having an upper hand when it comes to cost, GaN-on-Si suffers from a vertical breakdown voltage which was found to be limited by the silicon substrate [1]. Earlier investigations showed that this breakdown is related to the formation of an inversion channel at the interface between the nucleation layer and the silicon substrate [2, 3]. This inversion layer acts as a source for electron injection during the application of high positive voltages relative to the substrate, thus leading to a premature breakdown. In this work we report on the characterization of this inversion channel and demonstrate that it can be suppressed by optimizing the growth conditions of the AlN nucleation layer. To obtain a deeper understanding of the inversion layer properties, two MOCVD AlN nucleation samples were grown on highly p-doped Silicon substrates, growth temperatures between 800 °C and 950 °C, while the desorption temperature was held at 950 °C. Vertical structures were then etched, with annealed Ti/Al/Ni/Au as ohmic contact to the silicon and Ni/Au Schottky contact to the AlN.