F. Gianesello

A 53-to-68GHz 18dBm power amplifier with an 8-way combiner in standard 65nm CMOS

CMOS circuits operating up to 60GHz have been demonstrated to satisfy the market demand for high data rates and frequency bandwidths [1–6]. However, 60GHz products need an improvement in power performance as well as transistor reliability for large signal operation. Moreover, Class-A or Class-AB power amplifiers (PA) are mandatory to overcome the difficulty of the limited maximum available gain (MAG) at mm-Wave frequencies [1–6] and the high linearity required by the OFDM modulation used in the IEEE 802.15.3c wireless HD standard. That means a maximum drain-source voltage swing of twice the DC voltage, which introduces specific design or supply voltage in order to respect reliability constraints [1,7]. This paper describes a PA with 8 power-combined ways and cascode topology in a 7-metal-layer 65nm CMOS process which covers the full band for 60GHz wireless applications. The presented circuit operates at a standard supply of 1.2V or 1.8V, and achieves a saturated output power of 16.6dBm and 18.1dBm respectively. The measured output power is high for CMOS while insuring reliability for time-dependent dielectric breakdown (TDDB) and hot-carrier-injection (HCI) degradation.

Silicon full integrated LNA, filter and antenna system beyond 40 GHz for MMW wireless communication links in advanced CMOS technologies

Today, SiGe HBT and MOSFET cut-off frequencies are higher than 230 GHz (Chevalier et al., 2004) and this increase allows new millimeter wave (MMW) applications on silicon such as 60 GHz WLAN and 77 GHz automotive radar. This study focuses on a wireless communication block with the antenna integration. Functions such as amplifier and filter have been used to perform this block. This is a demonstration of individual component integration and co-integration with antenna/LNA matching. Antenna achieved on advanced sub 120nm HCMOS high resistivity silicon on insulator (HR SOI) (p >1 kOhms.cm) has been designed and integrated. A low noise amplifier (LNA) and a filter have been retained for this first chain. Antenna and block characterizations are led on a dedicated on-wafer test bench. Antenna performances in term of gain and radiation pattern are given. A communication link has been then established between a single antenna (-2 dB gain) and the full communication block with a -19 dB transmission gain at 40 GHz

65 nm RFCMOS technologies with bulk and HR SOI substrate for millimeter wave passives and circuits characterized up to 220 GHZ

Today, measurement of 65 nm CMOS technology demonstrates Ft around 200 GHz and Fmax higher than 250 GHz as stated in G. Dambrine et al. (2005), which are clearly comparable to advanced commercially available 100 nm III-V HEMT or state-of-the-art SiGe HBT based in P. Chevalier et al. (2004). This increase allows new millimeter wave (MMW) applications on silicon. One of the success keys is then the passive integration. In this paper, on-chip microstrip and coplanar waveguide, which have been achieved in STMicroelectronics 65 nm RF CMOS bulk (p=20 mOmegamiddotcm) and HR SOI (p> 1kOmegamiddotcm) processes, were characterized up to 220 GHz. In addition, active device performances are reviewed. Then, circuit examples are given up to 220 GHz. Finally, a benchmarking with state of the art Si, III-V and HR SOI comparable transmission lines (TLs) structures is proposed

Design for millimeter-wave applications in silicon technologies

This paper presents the potentialities of advanced BiCMOS and CMOS technologies for millimeter-wave applications. To begin, the target applications in these frequency bands are presented: from automotive cruise control radars to wireless links. Then, a large overview of the technological offer to address these applications is presented: SiGe BiCMOS, nanometer bulk and SOI CMOS technologies. This work focuses both on active and passive devices (BEOL) behavior to suit for design above 20 GHz. The paper continues with a presentation of several solutions for integrated circuits on the presented topic: front-end receiver blocks, transmission blocks and frequency synthesis solutions. An overview of state of the art silicon circuits is given. As a conclusion, perspectives regarding future challenges in terms of system integration and applications are discussed.

3D printed plastic 60 GHz lens: Enabling innovative millimeter wave antenna solution and system

During the past years, various research teams developed 60 GHz chipset solutions, using both advanced CMOS [1] and BiCMOS [2] technologies. But for the 60 GHz market to flourish not only low cost RFICs are required, low cost antennas and packages are also key elements. Recently, low cost High Density Interconnect (HDI) organic technology has been evaluated [3, 4] to develop 60 GHz module using antenna-in-package approach. Measured gain is in the order of 4 dBi but there is still a need to achieve higher gain in order to increase the transmit/receive range of the system. The use of a lens is an appealing solution since it enables to customize the system performances while using existing chipset solution. In this paper, we investigate the performances achievable by a plastic (ABS-M30) lens manufactured using low cost and rapid manufacturing 3D printing technology. Material properties at 60 GHz are reviewed, a preliminary 60 GHz lens design is detailed and the full system is validated using a WiGig wireless link (demonstrating a 10 dB improvement in the link budget in comparison with the system without lens).

HDI organic technology integrating built-in antennas dedicated to 60 GHz SiP solution

During past years, various research teams have been implied in the development of 60 GHz chipset solutions, using both BiCMOS and advanced CMOS technologies. But for the 60 GHz market to flourish not only low cost RFICs are required, low cost antennas and packages are also key points. So far, HTCC technology has been seen as the chosen one when targeting millimeter wave (MMW) applications. But since 60 GHz applications are targeting large volume consumer applications, the pressure on the cost of the packaging will become higher and it is highly desirable to explore alternative lower cost solutions than HTCC. In this paper, we present 60GHz integrated antennas in an innovative low cost High Density Interconnect (HDI) organic technology demonstrating promising high-gain antenna solution (>; 7 dBi).

1.8 dB insertion loss 200 GHz CPW band pass filter integrated in HR SOI CMOS Technology

Today, measurement of 65 nm CMOS [Dambrine, G., et al., 2005] and 130 nm-based SiGe HBTs [Chevalier, p. et al., 2004] technologies demonstrate both fT (current gain cut-off frequency) and fmax (maximum oscillation frequency) higher than 200 GHz, which are clearly comparable to advanced commercially available 100nm III-V HEMT. This increase allows new millimeter wave (MMW) applications on silicon. One of the success keys is then the passive integration. In this paper, on-chip coplanar waveguides (CPWs), which have been achieved in STMicroelectronics advanced nanometric RF CMOS High Resistivity (HR) SOI (rho > 1 kOmegaldrcm) process, and characterized up to 220 GHz are reported. Moreover, for the first time passive circuits working @ 220 GHz have been achieved and characterized demonstrating state-of-the-art performances and good agreement with electric simulations using developed models.

Silicon integrated antenna developments up to 80 GHz for millimeter wave wireless links

Today, SiGe HBT cut-off frequencies are higher than 230 GHz (P. Chevalier, et al., 2004) and this increase allows new millimeter wave (MMW) applications on silicon such as 60 GHz WLAN and 77 GHz automotive radar. One of the success keys is then the passive integration. This study focuses on a 52 GHz silicon integrated antenna and related feeding transmission line (TL) topics. Double slot antenna integrated in a standard BiCMOS process and 40 GHz coplanar patch antenna (2.3 dB gain @ 40 GHz) with a coplanar waveguide (CPW) feed line are depicted and characterized. Integrated TL achieved on standard STMicroelectronics (ST) BiCMOS, CMOS and silicon on insulator (SOI) technologies are described, performances are given (<0.7 dB/mm losses @ 80 GHz for SOI CPW). A full modeling has been developed up to 80 GHz with new approach for CPW on silicon technology due to passivation layer

State of the art integrated millimeter wave passive components and circuits in advanced thin SOI CMOS technology on high resistivity substrate

In this paper, a comparison between transmission line (TL) integrated in high resistivity (HR) silicon on insulator technology (SOI), standard CMOS and InP technologies is made. State of the art performances are reported on HR SOI with loss propagation of about 0.4 dB/mm@40 GHz and < 1 dB/mm@100 GHz. These results demonstrate that using HR SOI wafer suppressed substrate losses (like for III-V technology). In addition, model has been developed for the described TL. To illustrate these results two microwave passive circuits, a 80 GHz coupler and a 80-100 GHz band-pass filter with both 2.5dB insertion losses (for the HR SOI version) have been realized in standard bulk CMOS and HR SOI technologies for comparison and modelization purpose.

Feasibility Study of 4G Cellular Antennas for Eyewear Communicating Devices

A feasibility study of 4G cellular antennas operating in the LTE, GSM, DCS, PCS, and WLAN2400 standards for wirelessly connected eyewear is presented. The target bands are 700-960 MHz and 1.7-2.7 GHz. The antenna designs are capacitive coupling element types, with simple layout printed on one side of the printed circuit board (PCB) substrate. Three different antennas are examined in terms of obtainable bandwidth potential, reflection coefficient, and specific absorption rate (SAR) values considering two human-head models (SAM and Visible Human). The best antenna is -6 dB matched and has radiation efficiencies around 14% and 36% in respectively low and high frequency bands. Based on simulation data, SAR values could be above the 1-g standards.