F.J.G. Sanchez
Simón Bolívar University
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by F.J.G. Sanchez.
Solid-state Electronics | 2000
A. Ortiz-Conde; F.J.G. Sanchez; Juan Muci
Abstract Exact closed form solutions based on the Lambert W -function are presented to express the forward current–voltage characteristics of non-ideal single-exponential diodes containing all possible combinations of series and shunt parasitic resistances. It is shown that these expressions could be useful for carrying out highly accurate computations at speeds almost as fast as those possible when using less precise approximate solutions based on common elementary functions.
IEEE Transactions on Electron Devices | 2002
F.J.G. Sanchez; A. Ortiz-Conde; A. Cerdeira; M. Estrada; Denis Flandre; Juin J. Liou
Free-carrier mobility degradation in the channel and drain/source series resistance are two important parameters limiting the performance of MOS devices. In this paper, we present a method to extract these parameters from the drain current versus gate voltage characteristics of fully-depleted (FD) SOI MOSFETs operating in the saturation region. This method is developed based on an integration function which reduces errors associated with the extraction procedure and on the DC characteristics of MOS devices having several different channel lengths. Simulation results and measured data of FD SOI MOSFETs are used to test and verify the method developed.
Solid-state Electronics | 2001
A. Ortiz-Conde; A. Cerdeira; M. Estrada; F.J.G. Sanchez; Rodolfo Quintero
Abstract A technique is presented to extract the threshold voltage of amorphous thin film MOSFETs in the saturation region. The technique is proposed because threshold voltage extraction in amorphous TFTs is different, and in general more complex, than in conventional crystalline bulk devices, since these TFTs exhibit several notable dissimilarities inherent to their characteristics. The saturation drain current follows an m power-law type dependence on gate bias, with an m different from the conventional value of 2. Additionally, a plot of the saturation current as a function of gate bias does not reveal the existence of an inflexion point. The method presented, which extracts the value of the power-law parameter m as well, is based on the use of an auxiliary operator that involves the integration of the drain current as a function of gate voltage. The technique was tested and its accuracy verified using the measured characteristics of an experimental n-channel a-Si:H thin film MOSFET.
international caribbean conference on devices, circuits and systems | 2006
A. Ortiz-Conde; F.J.G. Sanchez; Juan Muci; Slavica Malobabic
A physical model of the one-dimensional undoped oxide-silicon-oxide system is presented based on the solution of its surface potential versus distance. It is proved that both previous approximate analytical solutions, for the cases when the electric field does and does not vanish inside the semiconductor, are completely equivalent. Approximate asymptotic analytical solutions are presented and compared to exact results numerically calculated by iteration. The results attest to the excellent accuracy of this formulation
ieee international caracas conference on devices circuits and systems | 2004
Slavica Malobabic; A. Ortiz-Conde; F.J.G. Sanchez
A model of the undoped-body symmetric dual-gate MOSFET is presented based on the explicit analytic solution of its surface potential using the Lambert W function. The total channel carrier charge and drain current may be readily obtained from this solution. Results from the proposed solution are compared to exact results numerically calculated by iteration.
international caribbean conference on devices, circuits and systems | 2006
A. Ortiz-Conde; E. Miranda; F.J.G. Sanchez; E. Farkas; Slavica Malobabic
A model for the post-breakdown leakage current in MOS p-silicon devices with ultra thin oxides is presented. The model is based on a combination of two ideal diodes and two resistances. Model parameters are extracted using nonlinear optimization
international symposium on the physical and failure analysis of integrated circuits | 2005
A. Miranda; A. Ortiz-Conde; F.J.G. Sanchez; E. Farkas
Modeling of the post-breakdown current in MOS devices is receiving considerable attention in the last years because of the ever decreasing reliability margins of the gate insulators as a consequence of the ongoing miniaturization trends. In this work, we explore a compact representation for this current after a hard breakdown event suitable for circuit simulation environments. The model is based on a diode-like equation with series resistance. Accurate parameters extraction is accomplished by means of the integral difference function (IDF) method using the exact expression for the current-voltage (I-V) characteristic.
international conference on solid state and integrated circuits technology | 1995
R. Narayanan; A. Ortiz-Conde; J.J. Liou; F.J.G. Sanchez; A Parthasarathy
Device simulations are carried out to study the physical mechanisms underlying the effective channel length of MOSFETs. Furthermore, the adequacy of widely used methods for extracting such a parameter is examined using different free-carrier mobility models implemented in the device simulator. Based on the simulation results, a more consistent and accurate definition for determining the effective channel length is also proposed.
international conference on microelectronics | 1997
A. Ortiz-Conde; E.G. Fernandes; J.J. Liou; R. Hassan; F.J.G. Sanchez; G. De Mercato; Waisum Wong; O.M. Castillo
A new method to extract the threshold voltage and the effective channel of MOSFETs, which is insensitive to the series resistances, is presented. This method, which is weakly dependent on the mobility model, is tested in circuit simulator and measurement environments.
international caribbean conference on devices, circuits and systems | 2008
A. Ortiz-Conde; E. Miranda; F.J.G. Sanchez; Juan Muci
The connection between two of the most frequently used mathematical models to fit the soft breakdown I-V characteristic in MOS devices was investigated. First, we show that our experimental data is well represented by the monomial power-law model and we extract its parameters by means of an auxiliary operator that involves numerical integration of the I-V curve. Next, we consider the co-tunneling conduction model, which represents the current by a polynomial expression with only odd-order terms and positive coefficients. The best fit of our experimental data to odd-order polynomials yields some negative coefficients, which is contrary to its physical foundations. Finally, in an attempt to conciliate both representations, we have approximated the power-law model to a polynomial with only odd-order terms and arbitrary coefficients and again we have found that is not possible to obtain all positive coefficients.