Fahad Qazi

Low-Power DT

A comparative design study of ultra-low-power discrete-time ΔΣ modulators (DT ΔΣMs) suited for medical implant devices is presented. Aiming to reduce the analog power consumption, the objective is to investigate the effectiveness of the switched-capacitor passive filter. Two design variants of 2nd-order ΔΣMs are analyzed and compared to a power-optimized standard active modulator (ΔΣM_AA). The first variant (ΔΣM_AP) employs an active filter in the 1st stage and a passive filter in the less critical 2nd stage. The second variant (OTA-less ΔΣM_PP) makes use of passive filters in both stages. For practical verification, all three modulators are implemented on a single chip in 65 nm CMOS technology. Designed for 500-Hz signal bandwidth, the ΔΣM_AA, ΔΣM_AP, and ΔΣM_PP achieve 76 dB, 70 dB and 67 dB peak SNDR, while consuming 2.1 μW, 1.27 μW, and 0.92 μW, respectively, from a 0.9 V supply. Furthermore, the ΔΣM_PP can operate at a supply voltage reduced to 0.7 V, achieving a 65 dB SNDR at 430 nW power and 0.296 pJ/step.

\Delta \Sigma

In this paper we present a design of a low-IF receiver frontend using a selective N-path filter which serves blocker rejection, image rejection, and downconversion. The filter makes use of quadrature impedance upconversion technique using multiphase clocking and can be programmed by baseband capacitance and gm-cell transconductance values to meet the low-IF criterion in various cases. Presented is both a mathematical model of the filter and circuit simulation results including parasitic effects. Image rejection of 14 dB at IF that is provided by the filter mitigates the demands for the ultimate image rejection by the IQ mode. The blocker rejection at IF is larger than 50 dB. Designed in in 65 nm CMOS the low-IF receiver frontend with a modified N-path filter in simulations achieves NF <; 6 dB and OOB IIP3 > +8 dBm in 0.5-1 GHz band.

Modulators Using SC Passive Filters in 65 nm CMOS

In this paper we study passive switched-capacitor sigma-delta (ΣΔ) modulators suitable for low power applications. Using a one-bit quantizer as the only active block those modulators save power and achieve high linearity. However, their order is largely limited since the passive loop filter presents a significant attenuation to the signal. Typically with a second-order filter the modulator can achieve a satisfactory signal-to- quantization-noise ratio (SQNR) by using a large enough oversampling ratio (OSR) that also creates a tradeoff with the power consumption. A passive ΣΔ modulator when modeled as a linear system requires extraction of the equivalent loop gain. It is shown that for this purpose the quantization and thermal noise should be considered jointly. The paper presents optimization of the modulator in the design space defined by the filter capacitor ratios and the feedback coefficients. Both circuit and system level behavioral models are extensively exploited for this purpose. Provided is a detailed analysis of the thermal noise, quantization noise, and other parasitic effects. The design verified by 65 nm CMOS chip demonstrates very good agreement with the developed models. The measurements show signal-to-noise-and-distortion ratio (SNDR) of 73 dB and with energy efficiency of 0.27 pJ/step at 0.9 V supply. For supply voltage reduced to 0.7 V the power consumption is 0.47 μW with SNDR = 71 dB while energy efficiency is 0.16 pJ/step.

Blocker and image reject low-IF frontend

The quality of RF N-path filtering is limited by the performance of the involved multiphase clock. The paper presents analysis of critical clock imperfections. The phase imbalance that gives rise to an extra image band located at second harmonic frequency is analyzed by a linear periodically varying (LPV) model of a 4-path filter where the respective rejection ratio is estimated and verified by simulation. We also analyze the clock phase noise and devise that the reciprocal mixing is not diminished by the attained blocker rejection, however, in this case one can benefit from band limitation by the output capacitance of the driving transconductance amplifier (LNTA). The analysis is supported by simulation results.

Passive SC Sigma Delta Modulators Revisited: Analysis and Design Study

In this paper we investigate a spectrum sensing technique suitable for cognitive radio (CR) considered a means to mitigate congestion in the future multiple access communication systems. The ultimate objective is opportunistic use of unoccupied frequency bands called spectrum holes or white spaces, which belong to another system. For this purpose, first, we identify the spectrum sensor (SS) nonlinearities and scan the available spectrum in wideband mode where the primary task is to identify strong interference. Next, by a complementary analysis we pick up channels which are likely to be spectrum holes. In the second stage the SS is tuned to a selected sub-band by making use of a built-in flexible RF filter which largely attenuates interference and the related intermodulation distortions (IMD). The scan process carried out in this stage is aimed at detection of a vacant channel, i.e. containing only noise that must be distinguished from a possible weak signal that usually requires a significant computation overhead, but as the scan is narrowband and the S/N ratio can be high, the related overhead is largely reduced compared to the wideband sensing approach. The strength of this technique is in the flexible RF filter eliminating IMD which typically tend to obscure the spectrum holes.