G.J. Scilla

75-GHz f/sub T/ SiGe-base heterojunction bipolar transistors

The fabrication of silicon heterojunction bipolar transistors which have a record unity-current-gain cutoff frequency (f/sub T/) of 75 GHz for a collector-base bias of 1 V, an intrinsic base sheet resistance (R/sub bi/) of 17 k Omega / Square Operator , and an emitter width of 0.9 mu m is discussed. This performance level, which represents an increase by almost a factor of 2 in the speed of a Si bipolar transistor, was achieved in a poly-emitter bipolar process by using SiGe for the base material. The germanium was graded in the 45-nm base to create a drift field of approximately 20 kV/cm, resulting in an intrinsic transit time of only 1.9 ps.<<ETX>>

Graded-SiGe-base, poly-emitter heterojunction bipolar transistors

Si/Si/sub 1-x/Ge/sub x/ heterojunction bipolar transistors (HBTs) fabricated using a low-temperature epitaxial technique to form the SiGe graded-bandgap base layer are discussed. These devices were fabricated on patterned substrates and subjected to annealing cycles used in advanced bipolar processing. These devices, which have base widths under 75 mm, were found to have excellent junction qualities. Due to the small bandgap of SiGe, the collector current at low bias is ten times higher than that for Si-base devices that have a pinched base resistance. This collector current ratio increases to more than 40 at LN/sub 2/ temperature resulting in current gains of 1600 for the SiGe-base transistors despite base sheet resistances as low as 7.5 k Omega / Square Operator .<<ETX>>

Profile leverage in self-aligned epitaxial Si or SiGe base bipolar technology

The authors have developed a planar, self-aligned, epitaxial Si or SiGe-base bipolar technology and explored intrinsic profile design leverage for high-performance devices in three distinct areas: transit time reduction, collector-base (CB) junction engineering, and emitter-base (EB) junction engineering. High f/sub T/ Si (30-50 GHz) and SiGe (50-70 GHz) epi-base devices were integrated with trench isolation and polysilicon load resistors to evaluate ECL (emitter coupled logic) circuit performance. A 15% enhancement in ECL circuit performance was observed for SiGe relative to Si devices with similar base doping profiles in a given device layout. Minimum SiGe-base ECL gate delays of 24.6 ps (8 mW) were obtained. Lightly doped spacers were positioned in both the EB and CB junctions to tailor junction characteristics (leakage, tunneling, and avalanche breakdown), reduce junction capacitances, and thereby obtain an overall performance improvement.<<ETX>>

63-75 GHz f T SiGe-base heterojunction bipolar technology

Experimental results for maximum cut-off frequency (fT) values of 75 and 52 GHz were achieved for SiGe-base and Si-base bipolar transistors with intrinsic base sheet resistances in the 10-17 k&Omega;/square range. These results extend the speed of silicon bipolar devices into a regime previously reserved to GaAs and other compound semiconductor technologies. Excellent junction characteristics were also obtained for devices as large as 100000 &mu;m2 and for current densities as high as 106 A/cm2. The performance levels obtained for the SiGe transistors, which contain less than 10% germanium in the base, represent almost a factor of two increase in the speed of a Si bipolar transistor. These results demonstrate the significant performance advantage offered by SiGe heterojunction technology

Epitaxial-base transistors with ultrahigh vacuum chemical vapor deposition (UHV/CVD) epitaxy: enhanced profile control for greater flexibility in device design

A discussion is presented of the fabrication of small-geometry (1.0 mu m*20 mu m) epitaxial-base n-p-n bipolar transistors with high-doped bases of less than 100-nm width and base sheet-resistances of approximately 8 k Omega per square. An ultrahigh-vacuum chemical vapor deposition (UHV/CVD) 550 degrees C epitaxy process was used. The impurity profiles are found to be much more uniform than possible with other techniques so that intrinsic base sheet resistance and base width are largely decoupled. This allows fabrication of narrow-base bipolar devices with little temperature dependence of the I-V characteristics for operation below room temperature. The better control over thickness, combined with high doping levels, improves the flexibility in device design.<<ETX>>

Self-aligned SiGe-base heterojunction bipolar transistor by selective epitaxy emitter window (SEEW) technology

In the device a SiGe epitaxial base is integrated in a structure which uses in situ doped epitaxial lateral overgrowth for the formation of the emitter window and the extrinsic base contact. Nearly ideal I-V characteristics have been achieved for a base width of 60 nm with an intrinsic base resistance of 4.6 k Omega / Square Operator and for emitter widths down to 0.4 mu m. A DC collector current enhancement factor of 3.1 was obtained relative to a Si homojunction transistor with a 1.25 times higher intrinsic base resistance. The breakdown voltage BV/sub CBO/ is identical for both Si and SiGe devices, even though the collector-base depletion region is partly overlapped with the reduced-bandgap SiGe strained layer. The lower BV/sub CEO/, measured for the SiGe-base transistor, is due to the higher current gain. Based on these results the fabrication of high-speed bipolar circuits that take advantage of SiGe-base bandgap engineering seems possible using selective epitaxy emitter window (SEEW) technology.<<ETX>>

Sub-30ps ECL circuits using high-f/sub T/ Si and SiGe epitaxial base SEEW transistors

A high-performance bipolar technology is presented which involves Si and SiGe epitaxial base formation in a selective epitaxy emitter window (SEEW) structure. Si transistors have cut-off frequencies (f/sub T/) of 35-53 GHz while the f/sub T/ of SiGe devices ranges from 45 GHz to 63 GHz. The SEEW structure allowed emitter width reduction to 0.35 mu m using optical lithography with 0.8 mu m minimum linewidth to operate the device at high current density near maximum f/sub T/. The ECL (emitter coupled logic) gate delay is examined as function of the trade-off between f/sub T/ and intrinsic base resistance and of the main device parasitics, i.e., base resistance and collector-base capacitance. A minimum ECL gate delay of 24.3 ps was realized in an unloaded ECL ring oscillator.<<ETX>>

30 GHz polysilicon-emitter and single-crystal-emitter graded SiGe-base PNP transistors

The AC performance of SiGe-base PNP transistors has been limited by a valence band barrier at the base-collector junction caused by the retrograde Ge profile. A two-times improvement in f/sub T/ over previous work on SiGe-base PNPs is reported. The improvement was achieved by using a narrow base profile (W/sub B/=50 nm) and by grading the Ge across the neutral base and in the base-collector junction (the retrograde Ge profile). Similar results (f/sub T/=30 GHz) were achieved for both polysilicon emitter and single-crystal emitter PNP transistors with the same Ge retrograde profile. The position of the retrograde Ge profile in the base-collector junction was controlled by a self-aligned channeled boron implant through the SiGe base. Numerical simulations demonstrate that the peak f/sub T/ is very sensitive to the retrograde Ge position with respect to the base-collector doping profiles.<<ETX>>

High performance Si and SiGe-base p-n-p transistors

Heterojunction p-n-p transistors with SiGe bases have been fabricated. Molecular beam epitaxy (MBE) was used to deposit both Si and SiGe bases, and the emitter was formed by low-temperature epitaxy. The base thickness of the SiGe-base transistor, as measured by secondary ion mass spectrometry, is less than 70 nm. The current gain of the SiGe-base device is 20 at room temperature and increases with decreasing temperature. Preliminary high-frequency measurements of small-geometry transistors have established a cutoff frequency of 10 GHz for the Si-base and above 12 GHz for the SiGe-base transistors. These are believed to be the fastest bipolar p-n-p transistors fabricated in silicon technology.<<ETX>>

Epitaxial-base double-poly self-aligned bipolar transistors

Reports the incorporation of Si and Si-Ge low temperature epitaxially (LTE) grown bases into an advanced submicron self-aligned double-poly device structure. The major advantages of using an LTE-base are the ability to incorporate coherently strained Si-Ge layers and to grow very thin in-situ doped layers with a boxlike dopant distribution. The epitaxial base layer was integrated using both epitaxy-after-sidewall (EAS) and epitaxy-before-sidewall approaches, and devices with an intrinsic base width of approximately=60 nm and a pinch base resistance of 5.0 k Omega / Square Operator in walled and non-walled emitter configurations were fabricated. The electrical characteristics of the walled-emitter devices obtained by the EAS approach were excellent. The application of the walled-emitter devices, due to their reduced parasitics and higher density, is very promising in high-performance low-power bipolar circuits.<<ETX>>