George E. Matthew

A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS

A fully on-die, digitally controlled, 500MHz switching, 250mA rated output buck Voltage Regulator (VR) implemented in 22nm Tri-Gate CMOS is presented. The silicon measured a peak efficiency of 68% and consumed an area of 0.6mm2 (without output decoupling) with a power density of about 410 mW/mm2. The paper also demonstrates a controller bandwidth of 43MHz; the highest reported to date for any digital controller, resulting in output voltage ramp rates as high as 10V/μsec.

A digitally controlled fully integrated voltage regulator with 3D-TSV based on-die solenoid inductor with backside planar magnetic core in 14nm tri-gate CMOS

A fully integrated digitally controlled buck VR, featuring hysteretic and PFM control for maximum light load efficiency, with 3D-TSV based on-die solenoid inductor with backside planar magnetic core in 14nm tri-gate CMOS demonstrates 111 nH/mm2 inductance density & 80% conversion efficiency.

Low power all digital acoustic noise suppression technique for switching voltage regulators

An all-digital method of pseudo randomly varying switching frequency of a buck VR in non-linear low power modes (hysteretic and pulse frequency modulation) is proposed in order to reduce acoustic noise. The switching frequency is maintained within the audio range, instead of being increased, and hence switching losses do not increase. The random variation in switching frequency in this scheme converts tonal noise to white noise which has lower peak power and is less noticeable to humans.

A 0.4V∼1V 0.2A/mm 2 70% efficient 500MHz fully integrated digitally controlled 3-level buck voltage regulator with on-die high density MIM capacitor in 22nm tri-gate CMOS

Monolithic integration of Voltage Regulators (VR) is challenging given the inherent lack of scalability of inductor. Circuit techniques to reduce inductor size are attractive to increase power density and scalability. This paper presents a 70~72% efficient, 500MHz digitally controlled 3-level Buck VR with a fully on-die spiral inductor implemented on 22nm Tri-Gate CMOS with MIM capacitors. The advantages of the 3-level converter for wide range Dynamic Voltage & Frequency Scaling (DVFS) over traditional solutions like linear regulators & Buck VRs are demonstrated.