Gerd Pfeiffer

High performance cmos bulk technology using direct silicon bond (dsb) mixed crystal orientation substrates

High performance 65-nm technology (Lpoly=45nm, EOT=1.2nm) bulk CMOS has been demonstrated for the first time on mixed orientation substrates formed by using direct silicon bonded (DSB) wafers and a solid phase epitaxy (SPE) process. The pFET performance is improved by 35% due to hole mobility enhancement on (110) surfaces as compared to (100) surfaces. nFETs on SPE-converted (100) surfaces exhibit the same performance as those on (100) controls. Ring oscillators fabricated using DSB with SPE show improvements of more than 20% compared with control CMOS on (100) surfaces

Uniaxial strain relaxation on ultra-thin strained-Si directly on insulator (SSDOI) substrates

Uniaxial strain relaxation of ultra-thin biaxial-tensile SSDOI is realized by ion-implant amorphization and solid phase epitaxy (II/SPE). The selective full amorphization in the thin SSDOI region, between raised source/drain (RSD) and channel, induces uniaxial strain relaxation in the channel. The SSDOI uniaxial strain relaxation enhances PFETs drive current by more than 20%