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Featured researches published by Gwang Sik Kim.


IEEE Electron Device Letters | 2014

Specific Contact Resistivity Reduction Through Ar Plasma-Treated TiO 2−x Interfacial Layer to Metal/Ge Contact

Gwang Sik Kim; Jeong Kyu Kim; Seung Hwan Kim; Jaesung Jo; Changhwan Shin; Jin-Hong Park; Krishna C. Saraswat; Hyun Yong Yu

We demonstrate contact resistivity reduction by inserting an Ar plasma-treated TiO<sub>2-x</sub> heavily doped interfacial layer to metal/semiconductor contact to overcome a Fermi-level pinning problem on germanium (Ge). A specific contact resistivity of 3.16 × 10<sup>-3</sup>Ω · cm<sup>2</sup> on moderately doped n-type Ge substrate (6 × 10<sup>16</sup>cm<sup>-3</sup>) was achieved, exhibiting ×584 reduction from Ti/Ge structure, and ×11 reduction from Ti/undoped TiO<sub>2</sub>/Ge structure. A novel doping technique for TiO<sub>2</sub> interfacial layer at low temperature using Ar plasma was presented to lower S/D contact resistance in Ge n-MOSFET.


IEEE Electron Device Letters | 2014

Analytical Study of Interfacial Layer Doping Effect on Contact Resistivity in Metal-Interfacial Layer-Ge Structure

Jeong Kyu Kim; Gwang Sik Kim; Changhwan Shin; Jin-Hong Park; Krishna C. Saraswat; Hyun Yong Yu

We present a new model to demonstrate the effect of heavily doped interfacial layer (IL) insertion on contact resistivity reduction in metal-germanium (Ge) structure. It is found that the doping of IL results in lowering Schottky barrier of Ge significantly, and based on this lowering effect, a metal-IL-semiconductor model is newly proposed. From this model, the abrupt reduction of contact resistivity is observed in heavily doped condition as IL thickness is increased, and the minimum contact resistivity for 1 × 1020 cm-3 doping concentration is reduced by ×25 compared with that of undoped one. These results are promising toward enhancing the device performance of Ge MOSFET, which is for sub-22-nm CMOS technology.


IEEE Electron Device Letters | 2015

Surface Passivation of Germanium Using SF 6 Plasma to Reduce Source/Drain Contact Resistance in Germanium n-FET

Gwang Sik Kim; Seung Hwan Kim; Jeong Kyu Kim; Changhwan Shin; Jin-Hong Park; Krishna C. Saraswat; Byung Jin Cho; Hyun Yong Yu

We demonstrate Fermi-level unpinning and contact resistance reduction by surface passivation using SF<sub>6</sub> plasma treatment of a metal/germanium (Ge) contact. A specific contact resistivity (Pc) of 1.14 × 10<sup>-3</sup> Ω · cm<sup>2</sup> and 0.31 eV of Schottky barrier height is achieved for a Ti/SF<sub>6</sub>-treated n-type Ge (n-Ge) (Nd = 1 × 10<sup>17</sup> cm<sup>-3</sup>) contact, exhibiting 1700 times Pc reduction from a Ti/nontreated n-Ge contact. A convenient and effective passivation process of the Ge surface is presented to alleviate Fermi-level pinning at metal/Ge contact and lower source/drain contact resistance of Ge n-type field-effect transistors.


ACS Applied Materials & Interfaces | 2016

Effective Schottky Barrier Height Lowering of Metal/n-Ge with a TiO2/GeO2 Interlayer Stack

Gwang Sik Kim; Sun Woo Kim; Seung Hwan Kim; June Park; Yujin Seo; Byung Jin Cho; Changhwan Shin; Joon Hyung Shim; Hyun Yong Yu

A perfect ohmic contact formation technique for low-resistance source/drain (S/D) contact of germanium (Ge) n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) is developed. A metal-interlayer-semiconductor (M-I-S) structure with an ultrathin TiO2/GeO2 interlayer stack is introduced into the contact scheme to alleviate Fermi-level pinning (FLP), and reduce the electron Schottky barrier height (SBH). The TiO2 interlayer can alleviate FLP by preventing formation of metal-induced gap states (MIGS) with its very low tunneling resistance and series resistance and can provide very small electron energy barrier at the metal/TiO2 interface. The GeO2 layer can induce further alleviation of FLP by reducing interface state density (Dit) on Ge which is one of main causes of FLP. Moreover, the proposed TiO2/GeO2 stack can minimize interface dipole formation which induces the SBH increase. The M-I-S structure incorporating the TiO2/GeO2 interlayer stack achieves a perfect ohmic characteristic, which has proved unattainable with a single interlayer. FLP can be perfectly alleviated, and the SBH of the metal/n-Ge can be tremendously reduced. The proposed structure (Ti/TiO2/GeO2/n-Ge) exhibits 0.193 eV of effective electron SBH which achieves 0.36 eV of SBH reduction from that of the Ti/n-Ge structure. The proposed M-I-S structure can be suggested as a promising S/D contact technique for nanoscale Ge n-channel transistors to overcome the large electron SBH problem caused by severe FLP.


IEEE Electron Device Letters | 2016

Effect of Hydrogen Annealing on Contact Resistance Reduction of Metal–Interlayer–n-Germanium Source/Drain Structure

Gwang Sik Kim; Gwangwe Yoo; Yujin Seo; Seung Hwan Kim; Karam Cho; Byung Jin Cho; Changhwan Shin; Jin-Hong Park; Hyun Yong Yu

The effect of post-deposition H2 annealing (PDHA) on the reduction of a contact resistance by the metal-interlayer-semiconductor (M-I-S) source/drain (S/D) structure of the germanium (Ge) n-channel field-effect transistor (FET) is demonstrated in this letter. The M-I-S structure reduces the contact resistance of the metal/n-type Ge (n-Ge) contact by alleviating the Fermi-level pinning (FLP). In addition, the PDHA induces interlayer doping and interface controlling effects that result in a reduction of the tunneling resistance and the series resistance regarding the interlayer and an alleviation of the FLP, respectively. A specific contact resistivity (pc) of 3.4×10-4Ω·cm2 was achieved on a moderately doped n-Ge substrate (1×1017 cm-3), whereby 5900× reduction was exhibited from the Ti/n-Ge structure, and a 10× reduction was achieved from the Ti/Ar plasma-treated TiO2-x/n-Ge structure. The PDHA technique is, therefore, presented as a promising S/D contact technique for the development of the Ge n-channel FET, as it can further lower the contact resistance of the M-I-S structure.


IEEE Electron Device Letters | 2014

The Efficacy of Metal-Interfacial Layer-Semiconductor Source/Drain Structure on Sub-10-nm n-Type Ge FinFET Performances

Jeong Kyu Kim; Gwang Sik Kim; Hyohyun Nam; Changhwan Shin; Jin-Hong Park; Jong Kook Kim; Byung Jin Cho; Krishna C. Saraswat; Hyun Yong Yu

We investigate the impact of metal-interfacial layer-semiconductor source/drain (M-I-S S/D) structure with heavily doped n-type interfacial layer (n+-IL) or with undoped IL on sub-10-nm n-type germanium (Ge) FinFET device performance using 3-D TCAD simulations. Compared to the metal- semiconductor S/D structure, the M-I-S S/D structures provide much lower contact resistivity. Especially, the M-I-S S/D structure with n+-IL provides much lower contact resistivity, resulting in ~5× lower contact resistivity than 1×10-8 Ω-cm2, specified in International Technology Roadmap for Semiconductors. In addition, we found that the M-I-S structure with n+-IL remarkably suppresses the sensitivity of contact resistivity to S/D doping concentration.


IEEE Electron Device Letters | 2016

Non-Alloyed Ohmic Contacts on GaAs Using Metal-Interlayer-Semiconductor Structure With SF 6 Plasma Treatment

Seung Hwan Kim; Gwang Sik Kim; Sun Woo Kim; Jeong Kyu Kim; Changhwan Choi; Jin-Hong Park; Rino Choi; Hyun Yong Yu

We demonstrate the effect of SF6 plasma passivation with a ZnO interlayer in a metal-interlayer-semiconductor (MIS) structure to reduce source/drain (S/D) contact resistance. The interface trap states and the metal-induced gap states causing the Fermi-level pinning problem are effectively alleviated by passivating the GaAs surface with SF6 plasma treatment and inserting a thin ZnO interlayer, respectively. Specific contact resistivity exhibits ~104 × reduction when the GaAs surface is treated with SF6 plasma, followed by ZnO interlayer deposition, compared with the Ti/n-GaAs (~2 × 1018 cm-3) S/D contact. This result proposes the promising non-alloyed S/D ohmic contact for III-V semiconductor-based transistors.


ACS Applied Materials & Interfaces | 2016

The Effect of Interfacial Dipoles on the Metal-Double Interlayers-Semiconductor Structure and Their Application in Contact Resistivity Reduction

Sun Woo Kim; Seung Hwan Kim; Gwang Sik Kim; Changhwan Choi; Rino Choi; Hyun Yong Yu

We demonstrate the contact resistance reduction for III-V semiconductor-based electrical and optical devices using the interfacial dipole effect of ultrathin double interlayers in a metal-interlayers-semiconductor (M-I-S) structure. An M-I-S structure blocks metal-induced gap states (MIGS) to a sufficient degree to alleviate Fermi level pinning caused by MIGS, resulting in contact resistance reduction. In addition, the ZnO/TiO2 interlayers of an M-I-S structure induce an interfacial dipole effect that produces Schottky barrier height (ΦB) reduction, which reduces the specific contact resistivity (ρc) of the metal/n-type III-V semiconductor contact. As a result, the Ti/ZnO(0.5 nm)/TiO2(0.5 nm)/n-GaAs metal-double interlayers-semiconductor (M-DI-S) structure achieved a ρc of 2.51 × 10-5 Ω·cm2, which exhibited an ∼42 000× reduction and an ∼40× reduction compared to the Ti/n-GaAs metal-semiconductor (M-S) contact and the Ti/TiO2(0.5 nm)/n-GaAs M-I-S structure, respectively. The interfacial dipole at the ZnO/TiO2 interface was determined to be approximately -0.104 eV, which induced a decrease in the effective work function of Ti and, therefore, reduced ΦB. X-ray photoelectron spectroscopy analysis of the M-DI-S structure also confirmed the existence of the interfacial dipole. On the basis of these results, the M-DI-S structure offers a promising nonalloyed Ohmic contact scheme for the development of III-V semiconductor-based applications.


IEEE Electron Device Letters | 2015

Fermi-Level Unpinning Using a Ge-Passivated Metal–Interlayer–Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

Seung Hwan Kim; Gwang Sik Kim; Jeong Kyu Kim; Jin-Hong Park; Changhwan Shin; Changhwan Choi; Hyun Yong Yu

We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer- semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (~2 × 1018 cm-3) structure exhibits a ~1660× reduction compared with that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors.


Optics Letters | 2016

Asymmetrically contacted germanium photodiode using a metal–interlayer–semiconductor–metal structure for extremely large dark current suppression

Hwan Jun Zang; Gwang Sik Kim; Gil Jae Park; Yong Soo Choi; Hyun Yong Yu

In this study, we proposed germanium (Ge) metal-interlayer-semiconductor-metal (MISM) photodiodes (PD), with an anode of a metal-interlayer-semiconductor (MIS) contact and a cathode of a metal-semiconductor (MS) contact, to efficiently suppress the dark current of Ge PD. We selected titanium dioxide (TiO2) as an interlayer material for the MIS contact, due to its large valence band offset and negative conduction band offset to Ge. We significantly suppress the dark current of Ge PD by introducing the MISM structure with a TiO2 interlayer, as this enhances the hole Schottky barrier height, and thus acts as a large barrier for holes. In addition, it collects photo-generated carriers without degradation, due to its negative conduction band offset to Ge. This reduces the dark current of Ge MISM PDs by ×8000 for 7-nm-thick TiO2 interlayer, while its photo current is still comparable to that of Ge metal-semiconductor-metal (MSM) PDs. Furthermore, the proposed Ge PD shows ×6,600 improvement of the normalized photo-to-dark-current ratio (NPDR) at a wavelength of 1.55 μm. The proposed Ge MISM PD shows considerable promise for low power and high sensitivity Ge-based optoelectronic applications.

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Changhwan Shin

Seoul National University

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