Seung Hwan Kim

Specific Contact Resistivity Reduction Through Ar Plasma-Treated TiO 2−x Interfacial Layer to Metal/Ge Contact

We demonstrate contact resistivity reduction by inserting an Ar plasma-treated TiO_2-x heavily doped interfacial layer to metal/semiconductor contact to overcome a Fermi-level pinning problem on germanium (Ge). A specific contact resistivity of 3.16 × 10^-3Ω · cm² on moderately doped n-type Ge substrate (6 × 10¹⁶cm^-3) was achieved, exhibiting ×584 reduction from Ti/Ge structure, and ×11 reduction from Ti/undoped TiO₂/Ge structure. A novel doping technique for TiO₂ interfacial layer at low temperature using Ar plasma was presented to lower S/D contact resistance in Ge n-MOSFET.

Surface Passivation of Germanium Using SF 6 Plasma to Reduce Source/Drain Contact Resistance in Germanium n-FET

We demonstrate Fermi-level unpinning and contact resistance reduction by surface passivation using SF₆ plasma treatment of a metal/germanium (Ge) contact. A specific contact resistivity (Pc) of 1.14 × 10^-3 Ω · cm² and 0.31 eV of Schottky barrier height is achieved for a Ti/SF₆-treated n-type Ge (n-Ge) (Nd = 1 × 10¹⁷ cm^-3) contact, exhibiting 1700 times Pc reduction from a Ti/nontreated n-Ge contact. A convenient and effective passivation process of the Ge surface is presented to alleviate Fermi-level pinning at metal/Ge contact and lower source/drain contact resistance of Ge n-type field-effect transistors.

Effective Schottky Barrier Height Lowering of Metal/n-Ge with a TiO2/GeO2 Interlayer Stack

A perfect ohmic contact formation technique for low-resistance source/drain (S/D) contact of germanium (Ge) n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) is developed. A metal-interlayer-semiconductor (M-I-S) structure with an ultrathin TiO2/GeO2 interlayer stack is introduced into the contact scheme to alleviate Fermi-level pinning (FLP), and reduce the electron Schottky barrier height (SBH). The TiO2 interlayer can alleviate FLP by preventing formation of metal-induced gap states (MIGS) with its very low tunneling resistance and series resistance and can provide very small electron energy barrier at the metal/TiO2 interface. The GeO2 layer can induce further alleviation of FLP by reducing interface state density (Dit) on Ge which is one of main causes of FLP. Moreover, the proposed TiO2/GeO2 stack can minimize interface dipole formation which induces the SBH increase. The M-I-S structure incorporating the TiO2/GeO2 interlayer stack achieves a perfect ohmic characteristic, which has proved unattainable with a single interlayer. FLP can be perfectly alleviated, and the SBH of the metal/n-Ge can be tremendously reduced. The proposed structure (Ti/TiO2/GeO2/n-Ge) exhibits 0.193 eV of effective electron SBH which achieves 0.36 eV of SBH reduction from that of the Ti/n-Ge structure. The proposed M-I-S structure can be suggested as a promising S/D contact technique for nanoscale Ge n-channel transistors to overcome the large electron SBH problem caused by severe FLP.

Effect of Hydrogen Annealing on Contact Resistance Reduction of Metal–Interlayer–n-Germanium Source/Drain Structure

The effect of post-deposition H2 annealing (PDHA) on the reduction of a contact resistance by the metal-interlayer-semiconductor (M-I-S) source/drain (S/D) structure of the germanium (Ge) n-channel field-effect transistor (FET) is demonstrated in this letter. The M-I-S structure reduces the contact resistance of the metal/n-type Ge (n-Ge) contact by alleviating the Fermi-level pinning (FLP). In addition, the PDHA induces interlayer doping and interface controlling effects that result in a reduction of the tunneling resistance and the series resistance regarding the interlayer and an alleviation of the FLP, respectively. A specific contact resistivity (pc) of 3.4×10-4Ω·cm2 was achieved on a moderately doped n-Ge substrate (1×1017 cm-3), whereby 5900× reduction was exhibited from the Ti/n-Ge structure, and a 10× reduction was achieved from the Ti/Ar plasma-treated TiO2-x/n-Ge structure. The PDHA technique is, therefore, presented as a promising S/D contact technique for the development of the Ge n-channel FET, as it can further lower the contact resistance of the M-I-S structure.

Non-Alloyed Ohmic Contacts on GaAs Using Metal-Interlayer-Semiconductor Structure With SF 6 Plasma Treatment

We demonstrate the effect of SF6 plasma passivation with a ZnO interlayer in a metal-interlayer-semiconductor (MIS) structure to reduce source/drain (S/D) contact resistance. The interface trap states and the metal-induced gap states causing the Fermi-level pinning problem are effectively alleviated by passivating the GaAs surface with SF6 plasma treatment and inserting a thin ZnO interlayer, respectively. Specific contact resistivity exhibits ~104 × reduction when the GaAs surface is treated with SF6 plasma, followed by ZnO interlayer deposition, compared with the Ti/n-GaAs (~2 × 1018 cm-3) S/D contact. This result proposes the promising non-alloyed S/D ohmic contact for III-V semiconductor-based transistors.

The Effect of Interfacial Dipoles on the Metal-Double Interlayers-Semiconductor Structure and Their Application in Contact Resistivity Reduction

We demonstrate the contact resistance reduction for III-V semiconductor-based electrical and optical devices using the interfacial dipole effect of ultrathin double interlayers in a metal-interlayers-semiconductor (M-I-S) structure. An M-I-S structure blocks metal-induced gap states (MIGS) to a sufficient degree to alleviate Fermi level pinning caused by MIGS, resulting in contact resistance reduction. In addition, the ZnO/TiO2 interlayers of an M-I-S structure induce an interfacial dipole effect that produces Schottky barrier height (ΦB) reduction, which reduces the specific contact resistivity (ρc) of the metal/n-type III-V semiconductor contact. As a result, the Ti/ZnO(0.5 nm)/TiO2(0.5 nm)/n-GaAs metal-double interlayers-semiconductor (M-DI-S) structure achieved a ρc of 2.51 × 10-5 Ω·cm2, which exhibited an ∼42 000× reduction and an ∼40× reduction compared to the Ti/n-GaAs metal-semiconductor (M-S) contact and the Ti/TiO2(0.5 nm)/n-GaAs M-I-S structure, respectively. The interfacial dipole at the ZnO/TiO2 interface was determined to be approximately -0.104 eV, which induced a decrease in the effective work function of Ti and, therefore, reduced ΦB. X-ray photoelectron spectroscopy analysis of the M-DI-S structure also confirmed the existence of the interfacial dipole. On the basis of these results, the M-DI-S structure offers a promising nonalloyed Ohmic contact scheme for the development of III-V semiconductor-based applications.

Fermi-Level Unpinning Using a Ge-Passivated Metal–Interlayer–Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer- semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (~2 × 1018 cm-3) structure exhibits a ~1660× reduction compared with that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors.

Fermi-Level Unpinning Technique with Excellent Thermal Stability for n-Type Germanium

A metal-interlayer-semiconductor (M-I-S) structure with excellent thermal stability and electrical performance for a nonalloyed contact scheme is developed, and considerations for designing thermally stable M-I-S structure are demonstrated on the basis of n-type germanium (Ge). A thermal annealing process makes M-I-S structures lose their Fermi-level unpinning and electron Schottky barrier height reduction effect in two mechanisms: (1) oxygen (O) diffusion from the interlayer to the contact metal due to high reactivity of a pure metal contact with O and (2) interdiffusion between the contact metal and semiconductor through grain boundaries of the interlayer. A pure metal contact such as titanium (Ti) provides very poor thermal stability due to its high reactivity with O. A structure with a tantalum nitride (TaN) metal contact and a titanium dioxide (TiO2) interlayer exhibits moderate thermal stability up to 400 °C because TaN has much lower reactivity with O than with Ti. However, the TiO2 interlayer cannot prevent the interdiffusion process because it is easily crystallized during thermal annealing and its grain boundaries act as diffusion path. A zinc oxide (ZnO) interlayer doped with group-III elements, such as an aluminum-doped ZnO (AZO) interlayer, acts as a good diffusion barrier due to its high crystallization temperature. A TaN/AZO/n-Ge structure provides excellent thermal stability above 500 °C as it can prevent both O diffusion and interdiffusion processes; hence, it exhibits Ohmic contact properties for all thermal annealing temperatures. This work shows that, to fabricate a thermally stable and low resistive M-I-S contact structure, the metal contact should have low reactivity with O and a low work-function, and the interlayer should have a high crystallization temperature and a low conduction band offset to Ge. Furthermore, new insights are provided for designing thermally stable M-I-S contact schemes for any semiconductor material that suffers from the Fermi-level pinning problem.