Han-Ping Chen

Interface-State Modeling of

This paper presents a detailed analysis of the multifrequency capacitance–voltage and conductance–voltage data of

\hbox{Al}_{2}\hbox{O}_{3}

\hbox{Al}_{2}\hbox{O}_{3}/\hbox{n-InGaAs}

–InGaAs MOS From Depletion to Inversion

MOS capacitors. It is shown that the widely varied frequency dependence of the data from depletion to inversion can be fitted to various regional equivalent circuits derived from the full interface-state model. In certain regions, incorporating bulk-oxide traps in the interface-state model enables better fitting of data. By calibrating the model with experimental data, the interface-state density and the trap time constants are extracted as functions of energy in the bandgap, from which the stretch-out of gate voltage is determined. It is concluded that the commonly observed decrease of the 1-kHz capacitance toward stronger inversion is due to the increasing time constant for traps to capture majority carriers at the inverted surface.

Modeling and Design of Ferroelectric MOSFETs

A drain-current model has been developed for ferroelectric metal-oxide-semiconductor field-effect transistors by coupling Pao-Sah double integral with the nonlinear Landau description of the field and polarization of ferroelectric insulators. The resultant solution for surface potential ψs versus gate voltage Vg consists of double hysteresis loops sensitive to the ferroelectric-insulator thickness. With a proper choice of the ferroelectric-film thickness, the hysteresis shape can be tailored for operating voltages below 0.5 V, e.g., at VDD = 0.25 V, with a drain-current slope steeper than the reciprocal of 60 mV/dec beyond the threshold voltage.

On–Off Charge–Voltage Characteristics and Dopant Number Fluctuation Effects in Junctionless Double-Gate MOSFETs

Junctionless double-gate (DG) MOSFETs are assessed by analyzing the on-off characteristics of the mobile charge density as a function of gate voltage. Compared with undoped DG MOSFETs, junctionless MOSFETs have an inferior on-off charge performance with more degradation at higher doping. The results also indicate a major issue: dopant number fluctuations in minimum width junctionless MOSFETs. A first-order analytic expression shows that the one-sigma threshold fluctuation is proportional to the square root of doping concentration. Inclusion of the quantum effect makes no significant difference to the results.

Determination of energy and spatial distribution of oxide border traps in In0.53Ga0.47As MOS capacitors from capacitance-voltage characteristics measured at various temperatures

Abstract In this work, we have systematically studied the frequency dispersion of the capacitance–voltage (C–V) characteristics of In0.53Ga0.47As metal–oxide-semiconductor (MOS) capacitors in accumulation region at various temperatures based on a distributed border traps model. An empirical method to evaluate the frequency and temperature dependent response of the border traps distributed along the depth from the interface into the oxide is established. While the frequency dependent response results from the dependence of the time constant of the border traps on their depths, the temperature dependent response is ascribed to the thermal activated capture cross-section of the border traps due to the phonon-related inelastic capturing process. Consequently, it is revealed that the frequency dispersion behaviors of the accumulation capacitance at different temperatures actually reflect the spatial distribution of the border traps. On this basis, we propose a methodology to extract the border trap distribution in energy and space with emphasis on analyzing the C–V characteristics measured from low to high temperatures in sequence.

Effects of oxide thickness and temperature on dispersions in InGaAs MOS C-V characteristics

The apparent dependence of trap induced dispersion on oxide thickness in the InGaAs metal–oxide–semiconductor C-V data is explained by a thickness independent trap density. The model shows that for the same trap density, the normalized C-V dispersion due to border traps increases toward thinner oxides, whereas that due to interface states behaves oppositely, exactly as observed in the data. For the temperature effect, the dispersion in C-V from interface states diminishes at low temperatures, while that from oxide traps changes little to none. Those trends are shown to be driven by a temperature dependent trap time constant, not trap density.

Comparison of Bulk-Oxide Trap Models: Lumped Versus Distributed Circuit

Lumped- and distributed-circuit models for bulk-oxide traps are compared in terms of their fitting of p and n-type InGaAs MOS dispersion data. It is shown that the lumped-circuit model produces a distinct curvature in the capacitance versus log (frequency) plot-inconsistent with MOS data. Distributed-circuit model is able to fit both capacitance and conductance dispersions with a single, uniform oxide trap density, but the lumped-circuit model cannot. It is also shown that Hasegawa and Sawadas lumped-circuit model with an exponentially decaying distribution of border traps deviates even farther from the dispersion data.

Re-examination of the extraction of MOS interface-state density by C?V stretchout and conductance methods

The extraction of interface-state density by the stretchout of MOS C?V (Terman method) is re-examined. It is shown that the typical 1?MHz frequency is not nearly high enough to get rid of the interface-state contribution to the MOS capacitance. When coupled with a bias-dependent trap time constant (?), this could result in a severe underestimate of the interface-state density. The ?conductance method?, on the other hand, can extract the interface-state density accurately if the MOS is biased in depletion and if ? ? 1/? is within the measured frequency range. Also, the robustness of the conductance method subject to errors in the estimated oxide capacitance, as well as its extendibility into regions of weak and strong inversion is investigated. Furthermore, two cases of false peaks under the conductance method are mentioned: the first due to a small tunneling leakage in thin oxides and the second due to a high density of bulk-oxide traps.

A Unified Two-Band Model for Oxide Traps and Interface States in MOS Capacitors

The distributed oxide trap model based on tunneling of carriers from the semiconductor surface is unified with the two-band Shockley-Read-Hall type of capture and emission model for interface states. The new model explains the often observed upturn of MOS conductance at high frequencies when biased in inversion. The unified two-band model fully covers both types of charge traps in all MOS bias regions.