Gennadi Bersuker

Negative oxygen vacancies in HfO2 as charge traps in high-k stacks

The optical excitation and thermal ionization energies of oxygen vacancies in m-HfO2 are calculated using a non-local density functional theory with atomic basis sets and periodic supercell. The thermal ionization energies of negatively charged V- and V2- centers are consistent with values obtained by the electrical measurements. The results suggest that negative oxygen vacancies are essentially polaronic in origin. They are likely candidates for intrinsic shallow electron traps in the hafnium based gate stack devices. (c) 2006 American Institute of Physics.

A Physical Model of the Temperature Dependence of the Current Through

In this paper, we investigate the characteristics of the defects responsible for the leakage current in the SiO2 and SiO2/HfO2 gate dielectric stacks in a wide temperature range (6 K-400 K). We simulated the temperature dependence of the I -V characteristics both at positive and negative gate voltages by applying the multiphonon trap-assisted tunneling model describing the charge transport through the dielectric. In the depletion/weak inversion regime, the current is limited by the supply of carriers available for tunneling. In strong inversion, the temperature dependence is governed by the charge transport mechanisms through the stacks; in particular, in SiO2/HfO2 dielectric stacks, the coupling of the injected carriers with the dielectric phonons at the trap sites is the dominant mechanism. Matching the simulation results to the measurement data allows extracting important trap parameters, e.g., the trap relaxation and ionization energies, which identify the atomic structure of the electrically active defects in the gate dielectric.

\hbox{SiO}_{2}\hbox{/}\hbox{HfO}_{2}

The influence of Hf-based dielectrics on the underlying SiO2 interfacial layer (IL) in high-k gate stacks is investigated. An increase in the IL dielectric constant, which correlates to an increase of the positive fixed charge density in the IL, is found to depend on the starting, pre-high-k deposition thickness of the IL. Electron energy-loss spectroscopy and electron spin resonance spectra exhibit signatures of the high-k-induced oxygen deficiency in the IL consistent with the electrical data. It is concluded that high temperature processing generates oxygen vacancies in the IL responsible for the observed trend in transistor performance.

Stacks

Using ab initio density-functional total energy and molecular-dynamics simulations, we study the effects of various forms of nitrogen postdeposition anneal (PDA) on the electric properties of hafnia in the context of its application as a gate dielectric in field-effect transistors. We consider the atomic structure and energetics of nitrogen-containing defects which can be formed during PDA in various N-based ambients: N2, N2+, N, NH3, NO, and N2O. We analyze the role of such defects in fixed charge accumulation, electron trapping, and in the growth of the interface SiO2 layer. We find that nitrogen anneal of the oxides leads to an effective immobilization of native defects such as oxygen vacancies and interstitial oxygen ions, which may inhibit the growth of a silica layer. However, nitrogen in any form is unlikely to significantly reduce the fixed charge in the dielectric.

The effect of interfacial layer properties on the performance of Hf-based gate stack devices

Electron trapping in high- gate dielectrics under constant voltage stress is investigated. It is suggested that the electron trapping occurs through a two-step process: resonant tunneling of the injected electron into the preexisting defects (fast trapping) and thermally activated migration of trapped electrons to unoccupied traps (slow trapping). Characteristics of the electron traps extracted based on the proposed model are in good agreement with the calculated properties of the negatively charged oxygen vacancies. The model successfully describes low-temperature threshold voltage instability in NMOS transistors with /TiN gate stacks.

The role of nitrogen-related defects in high-k dielectric oxides: Density-functional studies

A methodology to analyze charge pumping (CP) data, which allows positions of probing traps in the dielectric to be identified, was applied to extract the spatial profile of traps in SiO2∕HfO2 gate stacks. The results suggest that traps accessible by CP measurements in a wide frequency range, down to few kilohertz, are located within or near the interfacial SiO2 layer rather than in the bulk of the high-k film.

Mechanism of Electron Trapping and Characteristics of Traps in

Response of the high-k gate dielectrics to low voltage stresses was studied by probing high-k transistors with various voltage/time measurements at different temperatures. The observed dependence of the transistor threshold voltage on stress time was attributed to electron trapping at pre-existing defects in the high-k dielectric rather than stress-induced trap generation. The dominance of the contribution from the reversible electron trapping on the pre-existing defects in the low voltage stress response raises the question on the applicability of the conventional reliability assessment methodology to the high-k dielectrics.

\hbox{HfO}_{2}

Nitrogen incorporation in HfO2∕SiO2 films utilized as high-k gate dielectric layers in advanced metal-oxide-semiconductor field effect transistors has been investigated. Thin HfO2 blanket films deposited by atomic layer deposition on either SiO2 or NH3 treated Si (100) substrates have been subjected to NH3 and N2 anneal processing. Several high resolution techniques including electron microscopy with electron energy loss spectra, grazing incidence x-ray diffraction, and synchrotron x-ray photoelectron spectroscopy have been utilized to elucidate chemical composition and crystalline structure differences between samples annealed in NH3 and N2 ambients as a function of temperature. Depth profiling of core level binding energy spectra has been obtained by using variable kinetic energy x-ray photoelectron spectroscopy with tunable photon energy. An “interface effect” characterized by a shift of the Si4+ feature to lower binding energy at the HfO2∕SiO2 interface has been detected in the Si 1s spectra; however,...

Gate Stacks

The gate stack should be regarded as a multi-element interfacial layered structure wherein the high-k gate dielectric and gate electrodes (and their corresponding interfaces) must be successfully comprehended. The surface clean and subsequent surface conditioning prior to high-k deposition as well as post-deposition annealing parameters significantly impact the equivalent oxide thickness and leakage current as well as the traditional parameters such as threshold voltage, saturation current, transconductance, and sub-threshold swing. The control of both the fixed electrical charges and charge traps incorporated at the various interfaces and within the high-k bulk film is of paramount importance to achieve the requisite transistor characteristics and, in particular, the effective carrier mobility. Interactive effects within the gate stack process modules and the subsequent integrated circuit fabrication process require the utmost attention to achieve the desired IC performance characteristics and help facilitate the continuance of Moores Law towards the 10-nm physical gate length regime.

Spatial distributions of trapping centers in HfO2∕SiO2 gate stacks

Densities of interfacial and bulk defects in high-κ dielectrics are typically about two orders of magnitude larger than those in Si–SiO2 devices. An asymmetry in electron and hole trapping kinetics, first detected in test capacitor devices with nanocrystalline ZrO2 and HfO2 dielectrics, is a significant potential limitation for Si device operation and reliability in complementary metal oxide semiconductor applications. There are two crucial issues: i) are the electron and hole traps intrinsic defects, or are they associated with processed-introduced impurities?, and ii) what are the local atomic bonding arrangements and electronic state energies of these traps? In this study, thin film nanocrystalline high-κ gate dielectrics, TiO2, ZrO2, and HfO2 (group IVB TM oxides), are investigated spectroscopically to identify the intrinsic electronic structures of valence and conduction band states, as well as those of intrinsic bonding defects. A quantitative/qualitative distinction is made between crystal field and Jahn–Teller (J–T) d-state energy differences in nanocrystralline TM elemental oxides, and noncrystalline TM silicates and Si oxynitrides. It is experimentally shown and theoretically supported that a length scale for nanocrystallite size <2–3 nm i) eliminates J–T d-state term splittings in band edge π-bonded d-states, and ii) represents a transition from the observation of discrete band edge defects to band-tail defects. Additionally, π-state bonding coherence can also be disrupted with similar effects on band edge and defect states in HfO2 films which have been annealed in NH3 at 700 °C, and display Hf–N bonds in N atom K1 edge X-ray absorption spectra.