Haw-Jyh Liaw

Chip-to-chip communication system using an ac-coupled bus and devices employed in same

Low-latency equalization in multi-level, multi-line communication systems

Spread spectrum clocking of digital signals

Integrated circuit device having a capacitive coupling element

Active impedance compensation

Apparatus and method for reducing clock signal phase skew in a master-slave system with multiple latent clock cycles

Multilevel signal interface testing with binary test apparatus by emulation of multilevel signals

Technique for determining performance characteristics of electronic devices and systems

Apparatus and method for utilizing a lossy dielectric substrate in a high speed digital system

Memory System Having Memory Devices on Two Sides