Hayden C. Cranford

Low voltage CMOS analog multiplier with extended input dynamic range

Unified digital architecture

On chip multiple voltage generation using a charge pump and plural feedback sense circuits

SYSTEM AND METHOD FOR BALANCING DELAY OF SIGNAL COMMUNICATION PATHS THROUGH WELL VOLTAGE ADJUSTMENT

Method for determining jitter of a signal in a serial link and high speed serial link

Environmental and computing cost reduction with improved reliability in workload assignment to distributed computing nodes

Receiver for clock and data recovery and method for calibrating sampling phases in a receiver for clock and data recovery

Power network reconfiguration using MEM switches

Power conservation in communication systems

Low voltage CMOS circuit for on/off chip drive at high voltage