Hee-Bum Jung

An implemented of H.264 video decoder using hardware and software

In this paper, we present a design of video single chip decoder for portable multimedia application. The single- chip called as A-MoVa (advanced mobile video ASIC). This chip has mixed hardware/software architecture to combine performance and flexibility. We designed by using the partition between hardware and software block. We developed the architecture of H.264 decoder based on SoC platform. This chip contains 290,000 gates of logics, 670,000 gates of memories and the chip size was 7.5 mm times 7.5 mm which was fabricated using 0.25 micron 4-layers metal CMOS technology

The MPEG-4 BSAC audio decoder in terrestrial DMB receiver

We have developed the BSAC audio decoder for T-DMB (terrestrial DMB) receiver. Here, we introduce and present an efficient implementation of BSAC audio decoder which consists of fast computation algorithm of filterbank, effective memory management of DSP, auto sampling frequency detection, simple lip sync method for A/V synchronization, error recovery circuit against some contaminating audio data and compact SDRAM hardware interface to receive the parsed MPEG-2 TS (transport stream). Because this decoder operates with low power consumption in spite of various functions, it is efficient for portable multimedia devices

Implementation of baseband chip for the terrestrial digital multimedia broadcasting (T-DMB) system

A new national standard for terrestrial digital multimedia broadcasting (T-DMB) has been announced in Korea to provide high quality digital audio, video, and data broadcasting services to fixed, mobile, and portable receivers. We have developed an FPGA/ASIC implementation for the T-DMB system. The paper describes the features and functions of the newly developed T-DMB system. We also present the design, implementation, and performance of the baseband chip for the T-DMB system. The chip was fabricated using a 0.25 /spl mu/m 1P4M CMOS process.

Development of portable sound effector

This paper presents an implementation of portable sound effector using the tiny packaged sound effect module which includes implemented sound effects, sound effect SoC, and EEPROM. The SoC integrates the embedded DSP core, an audio codec, some peripheral blocks, and various sound effect algorithms where cost savings made by reducing the chip count and size. In the implementation of sound effect algorithms, we employ the primitive functions of the DSP compiler, which provide an efficient way to optimize the compiled code. This portable sound effector is developed as an all-in-one product for the low cost and high portability.

Design of Audio and Video decoder for the T-DMB Receiver

We present a low-power architectural MPEG-4 part-10 AVC/H.264 video and MPEG-4 BSAC audio decoder chip capable of delivering high-quality and high-compression in wireless multimedia applications such as DMB (digital multimedia broadcasting). This AV decoder chip comprise all units required for T-DMB multimedia decoding such as system demultiplexer, MPEG-4 AVC/H.264 video decoder and MPEG-4 BSAC audio decoder. The proposed audio/video decoder has low power consumption and has been implemented using a standard-cell library in 0.18 mum 1P6M CMOS technology

Audio/video processing for single-chip T-DMB decoder

This paper deals with aspects of audio/video processing for the T-DMB decoder chips. The proposed architectures were implemented in a new T-DMB decoder SoC. This SoC comprises all units required for T-DMB multimedia decoding such as system demultiplexer, MPEG-4 AVC/H.264 video decoder and MPEG-4 BSAC audio decoder. The proposed audio/video decoder has low power consumption and has been implemented using a standard-cell library in 0.18 /spl mu/m 1P6M CMOS technology.