Helmy Eltoukhy

CMOS image sensors

In this article, we provide a basic introduction to CMOS image-sensor technology, design and performance limits and present recent developments and future directions in this area. We also discuss image-sensor operation and describe the most popular CMOS image-sensor architectures. We note the main non-idealities that limit CMOS image sensor performance, and specify several key performance measures. One of the most important advantages of CMOS image sensors over CCDs is the ability to integrate sensing with analog and digital processing down to the pixel level. Finally, we focus on recent developments and future research directions that are enabled by pixel-level processing, the applications of which promise to further improve CMOS image sensor performance and broaden their applicability beyond current markets.

Computationally efficient algorithm for multifocus image reconstruction

A method for synthesizing enhanced depth of field digital still camera pictures using multiple differently focused images is presented. This technique exploits only spatial image gradients in the initial decision process. The image gradient as a focus measure has been shown to be experimentally valid and theoretically sound under weak assumptions with respect to unimodality and monotonicity. Subsequent majority filtering corroborates decisions with those of neighboring pixels, while the use of soft decisions enables smooth transitions across region boundaries. Furthermore, these last two steps add algorithmic robustness for coping with both sensor noise and optics-related effects, such as misregistration or optical flow, and minor intensity fluctuations. The dependence of these optical effects on several optical parameters is analyzed and potential remedies that can allay their impact with regard to the techniques limitations are discussed. Several examples of image synthesis using the algorithm are presented. Finally, leveraging the increasing functionality and emerging processing capabilities of digital still cameras, the method is shown to entail modest hardware requirements and is implementable using a parallel or general purpose processor.

A 0.18-μm CMOS bioluminescence detection lab-on-chip

The paper describes a bioluminescence detection lab-on-chip consisting of a fiber-optic faceplate with immobilized luminescent reporters/probes that is directly coupled to an optical detection and processing CMOS system-on-chip (SoC) fabricated in a 0.18-/spl mu/m process. The lab-on-chip is customized for such applications as determining gene expression using reporter gene assays, determining intracellular ATP, and sequencing DNA. The CMOS detection SoC integrates an 8 /spl times/ 16 pixel array having the same pitch as the assay site array, a 128-channel 13-bit ADC, and column-level DSP, and is fabricated in a 0.18-/spl mu/m image sensor process. The chip is capable of detecting emission rates below 10/sup -6/ lux over 30 s of integration time at room temperature. In addition to directly coupling and matching the assay site array to the photodetector array, this low light detection is achieved by a number of techniques, including the use of very low dark current photodetectors, low-noise differential circuits, high-resolution analog-to-digital conversion, background subtraction, correlated multiple sampling, and multiple digitizations and averaging to reduce read noise. Electrical and optical characterization results as well as preliminary biological testing results are reported.

A 0.18-/spl mu/m CMOS bioluminescence detection lab-on-chip

The paper describes a bioluminescence detection lab-on-chip consisting of a fiber-optic faceplate with immobilized luminescent reporters/probes that is directly coupled to an optical detection and processing CMOS system-on-chip (SoC) fabricated in a 0.18-/spl mu/m process. The lab-on-chip is customized for such applications as determining gene expression using reporter gene assays, determining intracellular ATP, and sequencing DNA. The CMOS detection SoC integrates an 8 /spl times/ 16 pixel array having the same pitch as the assay site array, a 128-channel 13-bit ADC, and column-level DSP, and is fabricated in a 0.18-/spl mu/m image sensor process. The chip is capable of detecting emission rates below 10/sup -6/ lux over 30 s of integration time at room temperature. In addition to directly coupling and matching the assay site array to the photodetector array, this low light detection is achieved by a number of techniques, including the use of very low dark current photodetectors, low-noise differential circuits, high-resolution analog-to-digital conversion, background subtraction, correlated multiple sampling, and multiple digitizations and averaging to reduce read noise. Electrical and optical characterization results as well as preliminary biological testing results are reported.

Modeling and base-calling for Dna Sequencing-By-Synthesis

The process of DNA sequencing-by-synthesis and its non-idealities are modeled as a noisy switched linear system parameterized by the unknown DNA sequence. The base-calling problem is then formulated as a parameter detection problem. As this system can have long memory, performing exact maximum-likelihood decoding is computationally prohibitive. An approximate ML method applied to experimental Pyrosequencing data demonstrates reliable read lengths exceeding 200 bases, which is significantly longer than that achieved by current methods

CMOS Sensors for Optical Molecular Imaging

imaging has been used in the study of gene expression and cell migration during mammalian and other vertebrate development, in the evaluation of animal models of human cancer, in drug discovery, and in revealing patterns of infectious disease and host response to infection. These techniques are expected to have a revolutionary impact on medicine, environmental testing, agriculture, and biodefense, especially through the development of

Modeling and Simulation of Integrated Luminescence Detection Platforms

We developed a simulation model of an integrated CMOS-based imaging platform for use with bioluminescent DNA microarrays. We formulate the complete kinetic model of ATP based assays and luciferase label-based assays. The model first calculates the number of photons generated per unit time, i.e., photon flux, based upon the kinetics of the light generation process of luminescence probes. The photon flux coupled with the system geometry is then used to calculate the number of photons incident on the photodetector plane. Subsequently the characteristics of the imaging array including the photodetector spectral response, its dark current density, and the sensor conversion gain are incorporated. The model also takes into account different noise sources including shot noise, reset noise, readout noise and fixed pattern noise. Finally, signal processing algorithms are applied to the image to enhance detection reliability and hence increase the overall system throughput. We will present simulations and preliminary experimental results.

A 0.18/spl mu/m CMOS 10/sup -6/ lux bioluminescence detection system-on-chip

A chip comprising a 8x16 pseudo-differential pixel array, 128-channel 13b ADC and column-level DSP is fabricated in a 0.18/spl mu/m CMOS process. Detection of 10/sup -6/lux at 30s integration time is achieved via on-chip background subtraction, correlated multiple sampling and averaged 128 13b digitizations/readout. The IC is 25mm/sup 2/ and contains 492k transistors.