Hideyuki Nagaishi

A 4-bit Josephson data processor chip

The authors describe a 4-bit Josephson data processor chip featuring on-chip control and data paths and near-GHz capability. It is a closed, stand-alone chip comprising a 4-bit data path and a control path and is aimed at high-speed digital signal processing. The die is 0.5 mm square, including pads, is fabricated using 2.5- mu m-rule Nb/AlO/sub x//Nb technology, and consists of 8454 Josephson junctions and 9027 resistors. The cross-shaped junction structure realizes critical current scattering of +or-6%, and a junction characteristic voltage V/sub m/ of 50 mV. A block diagram of the Josephson data processor is shown.<<ETX>>

Optical input/output interface system for Josephson junction integrated circuits

An optical input/output interface system for a Josephson junction integrated circuit is fabricated and tested. The system consists of a superconducting optical detector, a dc powered Josephson circuit, a dc powered Josephson high voltage circuit, a liquid-He-cooled semiconductor amplifier, and a liquid-He-cooled semiconductor laser. Features of the system are use of an ultrathin NbN film for the optical detector and adoption of the dc powered Josephson circuits for logic operation circuits. Correct optical output signal is detected by a liquid-He-cooled semiconductor photodiode. The optical input/output interface has the advantage of low heat penetration and low crosstalk compared to the interface using conventional coaxial lines. Moreover, dc powered Josephson circuits have an advantage of low crosstalk from power supply lines compared to conventional Josephson circuits, which are driven by ac supply current.<<ETX>>

3.5 GHz operation of a superconducting packet switch element

The paper introduces a prototype model of a superconducting packet switch which is composed of an input buffer, a contention solver, and a distribution network. The input buffer and the contention solver enable contention-free distribution of data packets. The total design of the prototype has been completed and the total operation has been numerically simulated and confirmed. A 2/spl times/2 switching element which controls the paths of two packets is the key component of the prototype. The basic switching element with 1-b data-width is fabricated by a standard Nb trilayer process. Three-junction SQUIDs driven by a three-phase powering clock are used in the switch. The correct operation up to 3.5 GHz, limited by the measurement setup, is confirmed. The margin evaluation shows there remains enough margin at GHz operations.

A DC-powered Josephson logic family that uses hybrid unlatching flip-flop logic elements (Huffles)

This paper describes the development of a dc-powered Josephson logic family that uses hybrid unlatching flip-flop logic elements (Huffles). The Huffle circuit used in this study is modified by adding a parallel resistor to the original Hebard-type Huffle circuit. Analysis of the circuits operation shows that the undesirable hung-up phenomena are prevented by this modification. Based on the result of the analysis, the circuits parameters are derived and a typical operating margin of /spl plusmn/26% is obtained. Besides AND/OR operations using a threshold logic operation, two-input exclusive OR (XOR), two-input multiplexor (MUX), and three-input majority (MAJ) operations are realized using a Huffle gate in which 2-Josephson-interferometers (2JI) in the standard Huffle gate are replaced by stacked-2JIs. Thus, a Huffle logic family, formed from NOT, AND, OR, XOR, MUX, MAJ, and flip-flop (FF), are constructed. By using this Huffle logic family, a 6-b arithmetic logic operating unit (ALU), a 6-b analog-to-digital converter (ADC), and a 6-b gray-to-binary converter (GBC) have been successfully operated. During high-speed testing, a 1-b comparator was operated up to an input bandwidth of 6 GHz.

An all DC-powered Josephson logic circuit

A novel DC-powered Josephson circuit is reported. An improved HUFFLE-type DC flip-flop with a parallel resistor, to prevent hang-up, is constructed by combinational circuits as well as sequential circuits. The basic device is a vertical type two-junction interferometer with only three-metal layers. The design rule is 2.5 mu m. High junction-current density allows for a wide operating margin even with a low inductance load. Basic circuit function test elements have been completed. The DC flip-flop with excess gate current works as a GHz range VCO (voltage controlled oscillator) for internal clock generation. The speedup junction successfully accelerated the switching speed. The ring-oscillator showed a minimum gate delay of 11.3 ps. >

Performance analysis of the Josephson DC flip-flop

A linear analytical model of the Josephson DC flip-flop is proposed. The model describes both the Baechtolds and Hebards flip-flops. The output signal line is treated as either a single inductance or a transmission line with a finite impedance. The former leads to the lumped model, while the latter leads to the distributed model. The lumped model gives the load condition for successful reset. This is given as a relationship between the CR and L/R time constant, where C is the device capacitance, L is the load inductance, and R is the load resistance. The switching delay is also described as a linear function of the CR and L/R. With the distributed circuit model, the load condition for successful reset is Z/sub 0/>or=R. Minimum delay is obtained at Z/sub 0/=R. Grounding one end of the output signal line reduces the delay more than the nongrounded configuration. The scalar relationship of the switching delay and the power consumption to the design rule is discussed.<<ETX>>

77GHz MMIC transceiver modules with thick-film multi-layer ceramic substrate for automotive radar applications

A 77GHz MMIC transceiver module has been developed for automotive radar applications by using a low-cost thick-film multi-layer ceramic substrate. The module accommodating all MMIC-based transceiver functions in a single-cavity housing for improved manufacturability can be either assembled with built-in Tx/Rx antennas or mounted on external antenna sheet, depending on required antenna beam width. The module, measuring 25/spl times/25/spl times/3.4mm/sup 3/ with 3.3g in weight, has demonstrated >150m target detection capability when evaluated in a radar system, compatible with our current production-type radar.

Multi-gigahertz operation of 3-junction-interferometer-based Josephson latching logic circuits

Josephson latching logic gates require an ac power supply for correct operation. Owing to the difficulty in fabricating Josephson regulators for large power currents, multi-phase sinusoidal power supply is the preferred method for multi-gigahertz operation. However, the inherently variable ac power reduces device margin for covering process variations. As a result, there exists a strong relationship between circuit size, maximum operating frequency and circuit throughput for a given available margin. The trade-offs between these performance criteria are analyzed for 3-junction-interferometer-based logic gates. Experimental evaluation of the multi-gigahertz operation of small circuits showed that careful design of power supply networks that reduce power supply fluctuations will be needed to maximize performance. Simulation and experimental results are discussed.