Hiroshi Fuketa

Robust and compact key generator using physically unclonable function based on logic-transistor-compatible poly-crystalline-Si channel FinFET technology

This paper presents a robust and compact SRAM physically-unclonable-function (PUF) cell using a polycrystalline-Si channel (poly-Si) FinFET, for the first time. Its process is identical to that of a crystalline-Si FinFET except channel material. A systematic comparison between poly- and crystalline-Si FinFET PUF cells, reveals that the poly-Si cell improves the intra-PUF hamming distance to 1/3.4 of that of the crystalline-Si cell and 15k logic-transistors for stabilizing PUF reproducibility are reduced with keeping the same stability. For this analysis, a newly defined noise margin for SRAM PUFs, which is different from the SRAM static noise margin, is introduced.

Demonstrating performance improvement of complementary TFET circuits by I on enhancement based on isoelectronic trap technology

We improved the performance of a complementary circuit comprising Si-based tunnel field-effect transistors (TFETs) by using isoelectronic trap (IET) technology. IET technology was found to increase the ON current (ION) 5 times in P-TFETs and 2 times in N-TFETs. The ION enhancement improved the inverter performance. In addition, ring oscillator (RO) circuit operation with the complementary TFET inverters was experimentally demonstrated for the first time. The RO circuit with IET-TFETs exhibited a higher operation frequency than that with conventional TFETs. IET technology provides a breakthrough towards realizing complementary circuits with Si-TFETs.

Fully Integrated, 100-mV Minimum Input Voltage Converter with Gate-Boosted Charge Pump Kick-Started by LC Oscillator For Energy Harvesting

A fully integrated step-up dc–dc converter for energy harvesting applications is presented. A minimum start-up voltage of 100 mV is achieved by the start-up mechanism based on an LC oscillator (LCO). Conventional voltage converters with the LCO-based start-up mechanism provide a significantly low conversion efficiency of around 1%. To overcome this drawback, the following two circuit techniques are proposed in this brief: 1) a gate-boosted charge pump; and 2) an LCO deactivation. The proposed voltage converter is fabricated in the 65-nm silicon-on-thin-buried-oxide process. The measurement results show that when the input voltage is 100 mV, the proposed converter can provide an output of 760 mV at a conversion efficiency of 33%, which is the highest efficiency compared with the conventional fully integrated voltage converters.

Session 15 overview: Innovations in technologies and circuits

This session covers a diverse set of novel technologies and circuits. The first 3 papers of this session implement circuits in large area technologies. Subsequent papers describe optical beam steering, interfaces to scalable quantum computing, ultra-high-resolution gravimetric mass sensing using NEMS arrays, dopamine sensing using graphene electrodes, 4F2 X-point technologies for archive systems, and integrated photonic crystals for physically unclonable functions (PUFs).

A 0.3-V 1-

This brief presents an ultralow-power wake-up receiver using ultrasound for Internet of Things applications. To achieve both high sensitivity and low power consumption, we propose a Colpitts-oscillator-based super-regenerative receiver (COSR). Owing to the simple architecture of the proposed COSR, a lowest supply voltage operation of 0.3 V and a smallest area are achieved. Furthermore, the power consumption of the proposed wake-up receiver is scalable and is determined by the input signal sensitivity and data rate, which are configurable by the user. In a field test, the proposed wake-up receiver consumes

\mu \text{W}

1~\mu \text{W}

Super-Regenerative Ultrasound Wake-Up Receiver With Power Scalability

, which is smaller by 77% than that of a conventional ultrasound wake-up receiver at a comparable communication distance and data rate.