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Dive into the research topics where Hiroshi Kodera is active.

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Featured researches published by Hiroshi Kodera.


Japanese Journal of Applied Physics | 1963

Diffusion Coefficients of Impurities in Silicon Melt

Hiroshi Kodera

Silicon single crystals are grown by the Czochralski method with a variety of growth rates and rotation rates. Segregation coefficients of impurities are found to depend on the growth conditions as is expected by the existing theory. Diffusion coefficients of impurities in silicon melt are determined for B, Al, Ga, In, P, As and Sb. Diffusion coefficients of group V impurities are found to increase as the tetrahedral covalent radius of the impurity atom decreases. In the case of group III impurities, the dependence of diffusion coefficients on the tetrahedral covalent radius is not so clear as in the case of group V impurities.


IEEE Transactions on Electron Devices | 1976

Two-dimensional numerical analysis of stability criteria of GaAs FET's

Ken Yamaguchi; Shojiro Asai; Hiroshi Kodera

Stability criteria of GaAs junction-gate FETs are studied by two-dimensional numerical analysis. The analysis covers the wide range of device geometry from the state of the art FET to the so-called Gunn effect digital devices. It is found that a GaAs FET exhibits either of the following three types of characteristics depending upon device geometry and doping concentration. First, for a thin channel with high doping concentration, the device tends to behave as a normal junction-gate FET with saturating current-voltage characteristics. This is even true when the n-l (device length) and n.d (device thickness) products exceed the previously accepted criteria for Gunn oscillation. Second, a stable negative resistance (SNR) is observed in devices with a moderate channel thickness. Third, for a thick channel, the device exhibits a Gunn oscillation with the domain propagating from the gate edge to the drain. These three categories of behavior are mapped on the nd plane with the help of simple analytic considerations. The map is found to compare well with experimental results.


IEEE Transactions on Electron Devices | 1976

Drain conductance of junction gate FET's in the hot electron range

Ken Yamaguchi; Hiroshi Kodera

A new model is proposed for the drain conductance of J-FETs in the hot electron range. The model is based on a physical picture revealed through two-dimensional numerical analysis. The two-dimensional analysis shows that the electron concentration changes gradually at the boundary of a depleted region which is defined by a conventional theory. Because of this gradual change, electrons can remain after the pinch-off and contribute to the drain current. Although the high electric field causes the electron velocity to saturate, the drift velocity vector rotates into the x axis (source-to-drain) with the increase in the drain voltage. The increase in the x component Vxof the drift velocity gives rise to a small increase in drain current, that is, a finite drain conductance. The proposed model takes into account the above two essential features, gradual change in electron distribution, and the rotation of the velocity vector. This model is constructed in a single formulation which describes the current-voltage characteristics from the linear to the saturated drain-current region. Theoretical calculations agree quite well with the experiment on GaAs Schottky barrier gate FETs.


IEEE Transactions on Electron Devices | 1975

GaAs dual-gate Schottky-barrier FET's for microwave frequencies

Shojiro Asai; Fumio Murai; Hiroshi Kodera

The benefits inherent in the tetrode structure and the potential of GaAs are combined to realized a dual-gate FET with low noise and a wide dynamic range at microwave frequencies. A design theory of the dual-gate FET is constructed on the basis of the Lehovec-Zuleeg model for single-gate FETs. The theory has led to a new device structure having a second gate with a deeper pinchoff voltage than the first which shows improved gain and noise performance. Also derived is the importance of minimizing parasitic feedthrough due, for example, to packages. Samples were fabricated using n-type epitaxial GaAs. The first and second gates were Schottky barriers, 1.2 and 2.5 µm long. The improved channel structure was accomplished by reducing the thickness of the epitaxial layer under the first gate. Samples were mounted and characterized in specially designed small-size ceramic packages with a feedthrough capacitance of only 0.004 pF. The possibility of gain control by means of second gate bias over a wide bandwidth is demonstrated.


Japanese Journal of Applied Physics | 1963

Constitutional Supercooling during the Crystal Growth of Germanium and Silicon

Hiroshi Kodera

Growth of heavily doped germanium and silicon crystals is investigated from the standpoint of constitutional supercooling. When the impurity concentration exceeds a certain value, corrugations appear on the crystal surface. The impurity concentration necessary for the appearance of the corrugation, the doping limit, is determined for various impurity elements. The analysis of the experimental results shows that definite magnitude of supercooling is required for the irregular growth of crystals which gives rise to corrugations on the crystal surface and results in the formation of polycrystals.


IEEE Transactions on Electron Devices | 1978

Submicrometer gate fabrication of GaAs MESFET by plasma etching

Susumu Takahashi; Fumio Murai; Hiroshi Kodera

Dry etching is employed in the direct fabrication of the main part of semiconductor devices. A submicrometer Schottky-barrier gate is constructed for GaAs MESFETs. The gate has a double-metal-layer configuration. The Au top metal layer is first delineated by ion milling with monitoring equipment, i.e., ion microanalyzer. The metal layer in contact with the GaAs substrate is chemically etched in CF4gas plasma. Controlled side etching of the Mo metal produces the submicrometer gate, leaving a wider top metal layer of Au. The amount of side etching deviates less than 0.05 µm and the gate length is reduced to 0.1 µm. No appreciable damage to the GaAs substrate is found as a result of plasma etching. Half-micrometer gate GaAs MESFETs fabricated by this dry etching technique achieved high-gain and low-noise performance in the X-band.


Journal of Lightwave Technology | 1995

High-performance compact optical WDM transceiver module for passive double star subscriber systems

Ichiro Ikushima; Susumu Himi; Tsuruki Hamaguchi; M. Suzuki; Narimichi Maeda; Hiroshi Kodera; Kiichi Yamashita

High-performance transceiver-type optical WDM interface modules with a volume of only 36 cc have been developed for PDS subscriber systems. The new module comprises an optical WDM sub-module, hybrid-integrated transmitter and receiver circuits. In the WDM sub-module, a planar lightwave circuit chip was hermetically sealed together with laser and photodiode chips in order to minimize the size of the transceiver module. The lightwave circuit was formed on an optical-waveguide chip by adopting a high-silica based optical-waveguide technology. The circuit has a 3-dB directional coupler for bi-directional transmission with a 1.3-/spl mu/m wavelength through a single fiber and a wavelength division multiplexer between both 1.3-/spl mu/m and 1.55-/spl mu/m wavelengths. The overall characteristics of the fabricated WDM sub-module achieved were a responsitivity of 0.25/spl plusmn/0.05 A/W, an insertion loss approximately 3 dB at 1.55 /spl mu/m and an isolation of 35 dB between both wavelengths. Optical output power of the fabricated transceiver module was -3.8 dBm. Also, receiver sensitivity of less than -35 dBm with an overload of over -14 dBm were obtained by introducing high-speed automatic gain and threshold control techniques. Thus, an allowable span loss of over 30 dB and an optical dynamic range of over 20 dB were attained. The preamble bit length required to reach stable receiver operation was confirmed to be within three bits. >


Japanese Journal of Applied Physics | 1974

A Theory for Intervalley Transfer Effect in Two-Valley Semiconductors

Toru Toyabe; Hiroshi Kodera

A theory of high-field transport in two-valley semiconductors is developed and its implication in the high frequency devices is discussed. The main feature of the present work is the use of the Boltzmann equation with a space drift term retained as the starting point of the theory. The theory predicts the existence of a cold region near the cathode contact. In this region, electrons are not heated enough to transfer to the upper valleys. The Gunn oscillation is suppressed in a short diode comparable to the length of the cold region, even though the product nl exceeds 1012cm-2. In this nonoscillating state, the average electron velocity surpasses the peak velocity of the static v-E curve, and consequently, an anomalously short transit time is expected. These theoretical results will have a great significance in the high frequency devices with short active regions.


IEEE Transactions on Electron Devices | 1975

Two-dimensional analysis of triode-like operation of junction gate FET's

Ken Yamaguchi; Toru Toyabe; Hiroshi Kodera

Triode-like operation of junction gate FETs is analyzed by two-dimensional computer simulation. Triode-like characteristics are shown to appear with the channel normally off and the depletion layer reaching the drain electrode. Triode-like current arises from carrier injection from the source electrode into the depleted region. Triode-like operation is achieved without intrinsic material.


IEEE Transactions on Electron Devices | 2003

Characterization of the frequency dispersion of transconductance and drain conductance of GaAs MESFET

Yumiko Hasumi; Tsutomu Oshima; Hiroshi Kodera

Frequency dispersions of the transconductance and the drain conductance of ion-implanted gallium arsenide (GaAs) metal-semiconductor field-effect transistors (MESFETs) are measured and analyzed. In the linear region of the MESFET (low drain voltage), a positive transconductance dispersion is observed, which is caused by the deep-level traps at the surface between the source and the gate. In the saturation region (high drain voltage), however, a negative transconductance dispersion becomes dominant. The drain conductance does not show a dispersion in the linear region, while a distinct positive dispersion is observed in the saturation region with the same activation energy as the negative transconductance dispersion. The difference of the dispersion activation energy of the MESFET with and without the p-buried layer beneath the channel indicates that the negative transconductance and the drain conductance dispersion are caused by the deep-level traps at the channel-substrate interface. Because there exists the high electric field at the drain edge of the gate and an electron accumulation layer is formed, the potential in the channel becomes lower when the drain current is larger with high gate voltage. The emission of electrons from electron traps with lower potential is the cause of the negative frequency dispersion.

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