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Dive into the research topics where Hiroshi Matsumura is active.

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Featured researches published by Hiroshi Matsumura.


international microwave symposium | 2014

Flip chip assembly for sub-millimeter wave amplifier MMIC on polyimide substrate

Yoichi Kawano; Hiroshi Matsumura; Shoichi Shiba; Masaru Sato; Toshihide Suzuki; Yasuhiro Nakasha; Tsuyoshi Takahashi; Kozo Makiyama; Naoki Hara

The sub-millimeter wave amplifier MMIC with flip-chip mounting on polyimide substrate has been realized. The thickness of the substrate and the pitch of GND vias are designed to suppress the air radiation from the slot pattern in the substrate. The test results of the micro-strip line formed on the polyimide substrate shows that the design is applicable to the assembly operated up to 320 GHz. The InP HEMT amplifier MMIC with the assembling technique achieved the operation in 240-260 GHz frequency band with the gain of 20 dB.


compound semiconductor integrated circuit symposium | 2013

230-240 GHz, 30 dB Gain Amplifier in INP-HEMT for Multi-10 Gb/s Data Communication Systems

Yoichi Kawano; Hiroshi Matsumura; Shoichi Shiba; Masaru Sato; Toshihide Suzuki; Yasuhiro Nakasha; Tsuyoshi Takahashi; Kozo Makiyama; Naoki Hara

In this paper, a multi-stage amplifier in 75-nm InP-HEMT technology is described. To achieve a remarkably high gain in a submillimeter waveband, feedback reduction architectures are proposed. The small signal gain of the fabricated amplifier is 30 dB around 230 GHz, and the 3-dB bandwidth is 228 to 242 GHz. The total power consumption of the amplifier was 130 mW. A modulator and an envelope detector are also implemented in the amplifier to confirm a large signal operation. When 10 Gb/s data is input to modulator, a clear eye-opening waveform from the detector output can be successfully obtained.


asia-pacific microwave conference | 2009

80-GHz and 40-GHz frequency dividers in 65-nm CMOS

Hiroshi Matsumura

High-speed CMOS frequency dividers with different topologies were investigated. An 80-GHz regenerative frequency divider (RFD) and a 40-GHz static frequency divider (SFD) were designed and fabricated in 65-nm CMOS technology. The RFD operates from 75.0 GHz up to 85.0 GHz, the highest speed in previously-reported CMOS RFDs, and consumes 5.17 mW from 1.2 V supply. The SFD operates from 5.0 GHz to 42.0 GHz and consumes 6.76 mW from 1.2 V supply. The divider core circuit of 80-GHz RFD and 40-GHz SFD occupy chip areas of 90 µm × 60 µm and 110 µm × 80 µm, respectively.


cpmt symposium japan | 2013

A 77 GHz CMOS power amplifier module using multi-layered redistribution layer technology

Masaru Sato; Yoshikatsu Ishizuki; Shinya Sasaki; Yoichi Kawano; Hiroshi Matsumura; Toshihide Suzuki; Motoaki Tani

This paper presents a new millimeter-wave module concept, which is an integration of CMOS monolithic microwave integrated circuits (MMICs) and passive devices fabricated using a redistribution layer (RDL) technology. To realize a low-loss passive circuit, we introduced a multi-metal-layer for the RDL. The first metal layer was used as ground to shield from substrates. The upper metal layers form passive RF components such as a thin film microstrip line (TFMSL), a spiral inductor, a balun, a power combiner, and an antenna. Detailed measurements and characterizations are presented, and we show their applicability in the millimeter-wave region. Moreover, this concept was applied to an integrating millimeter-wave module consisting of four identical CMOS power amplifiers and RDL power combiners to increase the output power. The module exhibited a saturation power of 15 dBm, which is almost four-times higher than that obtained from the single PA. The measured small-signal gain of the PA module was 5.4 dB. The total chip size was 2.2 × 1.5 mm2. The power consumption of the PA module was 800 mW.


Japanese Journal of Applied Physics | 2013

93–133 GHz Band InP High-Electron-Mobility Transistor Amplifier with Gain-Enhanced Topology

Masaru Sato; Shoichi Shiba; Hiroshi Matsumura; Tsuyoshi Takahashi; Yasuhiro Nakasha; Toshihide Suzuki; Naoki Hara

In this study, we developed a new type of high-frequency amplifier topology using 75-nm-gate-length InP-based high-electron-mobility transistors (InP HEMTs). To enhance the gain for a wide frequency range, a common-source common-gate hybrid amplifier topology was proposed. A transformer-based balun placed at the input of the amplifier generates differential signals, which are fed to the gate and source terminals of the transistor. The amplified signal is outputted at the drain node. The simulation results show that the hybrid topology exhibits a higher gain from 90 to 140 GHz than that of the conventional common-source or common-gate amplifier. The two-stage amplifier fabricated using the topology exhibits a small signal gain of 12 dB and a 3-dB bandwidth of 40 GHz (93–133 GHz), which is the largest bandwidth and the second highest gain reported among those of published 120-GHz-band amplifiers. In addition, the measured noise figure was 5 dB from 90 to 100 GHz.


international symposium on radio-frequency integration technology | 2015

A 76–81 GHz high efficiency power amplifier for phased array automotive radar applications

Ikuo Soga; Yohei Yagishita; Hiroshi Matsumura; Yoichi Kawano; Toshihide Suzuki; Taisuke Iwai

This paper describes the implementation of 76-81 GHz power amplifier (PA) in 65 nm CMOS technology. A customized transistor model enables the designing circuits operating at mm-wave band. The output matching of the PA was composed of low-pass network to reduce both footprint and matching loss. This makes the PA ideal for phased array radars. The measured results at 79 GHz achieved the small signal gain of 25.1 dB, the saturated output power (Psat) of 11.5 dBm, and the power added efficiency (PAE) of 13.6% at the supply voltage of 0.8 V. These results agreed with the simulation.


asia pacific microwave conference | 2015

265-GHz, 10-dB gain amplifier in 65-nm CMOS using on-wafer TRL calibration

Yohei Yagishita; Yoichi Kawano; Hiroshi Matsumura; Ikuo Soga; Toshihide Suzuki; Taisuke Iwai

In this paper, a 65-nm CMOS amplifier MMIC operating around 265 GHz is presented. To obtain a small signal gain of the amplifier in a frequency region close to Fmax (Maximum oscillation frequency) of a transistor, a neutralization technique of a feedback capacitance as well as a transistor model to neutralize it precisely are needed. For this purpose, the key is a de-embedding technique. To extract the intrinsic transistor characteristics from a test pattern for measurement, we employ an on-wafer TRL (Through-Reflect-Line) calibration method. In this method, the calibration patterns including Through, Reflect, and Line are fabricated on the same wafer with the transistor for modeling. With the help of the precise model based on on-wafer TRL, we can successfully obtain a gain of 10dB around 265 GHz, and an excellent agreement with simulation and measurement results.


topical meeting on silicon monolithic integrated circuits in rf systems | 2013

Submillimeter-wave InP HEMT amplifiers with current-reuse topology

Masaru Sato; Shoichi Shiba; Hiroshi Matsumura; Tsuyoshi Takahashi; Toshihide Suzuki; Yasuhiro Nakasha; Naoki Hara

This paper describes the use of InP HEMT technology to develop submillimeter-wave amplifier circuits. The amplifiers are designed using common-gate amplifiers with series inductors, which achieve both high gain and wide bandwidth. Two submillimeter-wave amplifiers are designed. One is a D-band amplifier that achieves a small-signal gain of 15 dB at 160 GHz and a -3 dB bandwidth of 89 GHz between 105 and 194 GHz. The other is a G-band amplifier that achieves a small signal gain of 10 dB at 200 GHz and a -3 dB bandwidth of 80 GHz between 130 and more than 220 GHz. These results demonstrate the design methodology is one of the best candidates for developing submillimeter-wave amplifiers.


international conference on indium phosphide and related materials | 2013

250–290 GHz amplifier in 75-nm InP HEMT technology using inverted microstrip transmission line

Hiroshi Matsumura; Shoichi Shiba; Masaru Sato; Tsuyoshi Takahashi

In this paper, we present the development of J-band amplifier in 75-nm InP HEMT technology. The circuit utilizes a six-stage common-source amplifier. An inverted microstrip line (IMSL) structure is employed for matching networks of the amplifier. The developed amplifier realizes a small signal gain of 17.3 dB and a 3-dB band width of 35 GHz from 254 GHz to 289 GHz.


european microwave conference | 2012

Millimeter-wave power amplifier module using redistribution layer technology

Masaru Sato; Yoshikatsu Ishizuki; Shinya Sasaki; Hiroshi Matsumura; Toshihide Suzuki; Motoaki Tani

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