Taisuke Iwai

Novel approach to fabricating carbon nanotube via interconnects using size-controlled catalyst nanoparticles

We propose a new approach to fabricating carbon nanotube (CNT) vias, which uses preformed catalyst nanoparticles to grow CNTs. A newly-designed impactor provided size-classified catalyst particles, and a new deposition system injected them into via holes down to 40 nm in diameter. The resultant CNT-via resistance was 0.59 Omega for 2-mum vias, which is the lowest ever reported, improved from the previous studies using catalyst films. The improvement resulted from higher-density CNTs grown in the via holes by employing the nanoparticle catalyst

Carbon nanotube bumps for LSI interconnect

We demonstrate, for the first time, carbon nanotube (CNT) flip chip bumps for LSI modules. The CNT bump is composed of a bundle of multi-walled CNTs. Resilient and flexible CNT bumps make flip chip LSI modules resistant to thermal stress. Furthermore, CNT bumps have a low electrical resistance and robustness over electromigration. In the experiment, the CNT bumps were used to connect a test evaluation group (TEG) chip and a host substrate, and their electrical resistance was evaluated. We found that the electrical contacts of CNT bumps with the chip and the substrate are important. For a good electrical contact, the CNT bumps were coated with gold and fixed to the chip and substrate. The resultant CNT bump with a diameter of 170 mum and a height of 100 mum exhibited a low resistance of 2.3 Omega. We then evaluated the flexibility of CNT bumps by pressing the TEG chip and measuring the displacement. The displacement between the TEG chip and host substrate was 10-20% of the bump height, demonstrating an excellent flexibility.

42% high efficiency two-stage HBT power amplifier MMIC for W-CDMA cellular phone system

This paper is the first to report a high efficiency two-stage HBT power amplifier MMIC for 1.95 GHz wide-band CDMA (W-CDMA) cellular phone system. Power amplifiers for W-CDMA system are required with high efficiency and high linearity over a wide range of output power level. To obtain a high efficiency, we chose a near class B operation. To obtain a high linearity, we suppressed the gain distortion due to a near class B operation by the adaptive biasing technique. The MMIC exhibited the highest power-added efficiency (PAE) of 42% ever reported, a gain of 30.5 dB, and an adjacent channel leakage power ratio (ACLR) it a 5 MHz offset frequency of -38 dBc at a Pout of 27 dBm under a supply voltage of 3.5 V with 3.84 Mcps HPSK modulation.

1.5 V Low-Voltage Microwave Power Performance of InAlAs/InGaAs Double Heterojunction Bipolar Transistors

In this paper, we report the first demonstration of microwave power performance of InAlAs/InGaAs double heterojunction bipolar transistors (DHBTs) obtained at an extremely low operating voltage of 1.5 V. In order to obtain a high output power (P out) at a low operating voltage, we used DHBTs rather than single heterojunction bipolar transistors (SHBTs) and thus reduced the offset voltage (V CE,offset). We obtained a much lower V CE,offset of 50 mV for the DHBT than that of 300 mV for a SHBT. At a low operation voltage of 1.5 V, the DHBT exhibited a P out of 20.6 dBm with a power added efficiency (η add) of 36.6% and a power gain (G a) of 8.5 dB biased for class-B operation at 1.9 GHz. The high-speed performance of the DHBT are a unity cutoff frequency (f T) of 76 GHz and a maximum oscillation frequency (f max) of 157 GHz. We also studied the reliability of DHBTs by conducting a 1000-hour accelerated life test. The InGaAs HBTs had a lifetime of 2×106 h at a junction temperature of 125°C with an activation energy of 0.95 eV.

Low-resistance multi-walled carbon nanotube vias with parallel channel conduction of inner shells [IC interconnect applications]

We have succeeded in lowering the resistance of multi-walled carbon nanotube (MWNT) vias, using parallel channel conduction of each tubes inner shells. By optimizing the structure of the interface between MWNTs and Ti bottom contact layers, we could obtain a via resistance of 0.7 /spl Omega/ for a 2-/spl mu/m-diameter via consisting of about 1000 MWNTs. The corresponding resistance of about 0.7 k/spl Omega/ per MWNT indicates that most of the inner shells contribute to carrier conduction as an additional channel. The total resistance of the CNT vias that we fabricated is in the same order of magnitude as the theoretical value of W plugs and one order of magnitude higher than the theoretical value of Cu vias.

Si microchannel cooler integrated with high power amplifiers for base station of mobile communication systems

This study demonstrated the first application of a Si microchannel cooler integrated with bump structures to apply as a new thermal management device for the high power amplifiers (HPAs). The structure consists of an HPA chip, Si bumps, and a Si microchannel cooler. The fine pitch Si bumps with metal coating are directly connected to the electrodes close to the active areas of AlGaN/GaN HEMT HPAs. The bump functions not only as a source electrode for small ground inductance, but also as the heat transfer path from HPAs. The heat from bumps is successfully transferred by the microchannel cooler. This first prototype of a Si microchannel cooler bonded to HPAs achieved a decrease of 0.3 °C/W in total thermal resistance compared to conventional face-up mounted HPAs.

Evaluation of Thermal Conductivity of a Multi-Walled Carbon Nanotube Using the ΔVgs Method

Thermal conductivity of a multi-walled carbon nanotube (MWNT) was evaluated using the ΔVgs method for the first time. MWNTs were prepared in pillars, and the pillars were placed on two aluminum nitride (AlN) substrates. An AlGaN/GaN high electron mobility transistor (HEMT) chip, which was set on an AlN substrate, was used as a thermometer and as a thermal source. The thermal resistance of the sample was measured using the ΔVgs method. From the thermal resistance of MWNT pillars, we succeeded in evaluating the thermal conductivity of a MWNT pillar and that of a MWNT as high as 74.2 and 950 W/(mK), respectively. The thermal conductivity of MWNTs evaluated in this study is much higher than that of usual metals. We confirmed that MWNTs are promising materials for heat dissipation problems.

13.3 A 56Gb/s W-band CMOS wireless transceiver

This paper presents a 56Gb/s 16-QAM 65nm CMOS transceiver using a W-band carrier. Two wideband IF signals are up- and downconverted simultaneously with 68GHz and 102GHz carriers. The transceiver achieves 56Gb/s data-rate with TX-to-RX EVM of -16.5dB within 0.1m distance. The transceiver consumes 260mW and 300mW from a 1V supply in TX and RX modes, respectively. This results in 10pJ/bit efficiency, which is a state-of-the-art-efficient high-data-rate mm-Wave CMOS transceiver.

Thermal management for flip-chip high power amplifiers utilizing carbon nanotube bumps

Carbon nanotubes (CNTs) have been successfully used as source bumps for flip-chip high power amplifiers (HPAs). We have fabricated fine pitch CNT bumps with metal coating, which have been connected to electrodes close to the active areas of AlGaN/GaN HEMTs. A flip-chip AlGaN/GaN HEMT HPA with a gate width of 28.8 mm utilizing CNT bumps and an operating voltage of 50 V exhibits an output power of 49.3 dBm at a frequency of 2.4 GHz.

Direction-Controlled Growth of Carbon Nanotubes

We have developed a method of directing or bending carbon nanotubes (CNTs) in the desired direction along a structure. The new method utilizes careful positioning of a catalyst with respect to the structure, so that the CNTs growing from the catalyst experience an effective van der Waals force from the structure. The force causes a CNT-bundle to grow in the desired direction. For instance, a CNT-bundle coming out of a hole can be bent to the right or left depending on the catalyst patterning at the bottom. This approach is promising for achieving three-dimensional CNT wiring for future electronic devices.