Ikuo Soga

Carbon nanotube bumps for LSI interconnect

We demonstrate, for the first time, carbon nanotube (CNT) flip chip bumps for LSI modules. The CNT bump is composed of a bundle of multi-walled CNTs. Resilient and flexible CNT bumps make flip chip LSI modules resistant to thermal stress. Furthermore, CNT bumps have a low electrical resistance and robustness over electromigration. In the experiment, the CNT bumps were used to connect a test evaluation group (TEG) chip and a host substrate, and their electrical resistance was evaluated. We found that the electrical contacts of CNT bumps with the chip and the substrate are important. For a good electrical contact, the CNT bumps were coated with gold and fixed to the chip and substrate. The resultant CNT bump with a diameter of 170 mum and a height of 100 mum exhibited a low resistance of 2.3 Omega. We then evaluated the flexibility of CNT bumps by pressing the TEG chip and measuring the displacement. The displacement between the TEG chip and host substrate was 10-20% of the bump height, demonstrating an excellent flexibility.

Si microchannel cooler integrated with high power amplifiers for base station of mobile communication systems

This study demonstrated the first application of a Si microchannel cooler integrated with bump structures to apply as a new thermal management device for the high power amplifiers (HPAs). The structure consists of an HPA chip, Si bumps, and a Si microchannel cooler. The fine pitch Si bumps with metal coating are directly connected to the electrodes close to the active areas of AlGaN/GaN HEMT HPAs. The bump functions not only as a source electrode for small ground inductance, but also as the heat transfer path from HPAs. The heat from bumps is successfully transferred by the microchannel cooler. This first prototype of a Si microchannel cooler bonded to HPAs achieved a decrease of 0.3 °C/W in total thermal resistance compared to conventional face-up mounted HPAs.

Thermal management for flip-chip high power amplifiers utilizing carbon nanotube bumps

Carbon nanotubes (CNTs) have been successfully used as source bumps for flip-chip high power amplifiers (HPAs). We have fabricated fine pitch CNT bumps with metal coating, which have been connected to electrodes close to the active areas of AlGaN/GaN HEMTs. A flip-chip AlGaN/GaN HEMT HPA with a gate width of 28.8 mm utilizing CNT bumps and an operating voltage of 50 V exhibits an output power of 49.3 dBm at a frequency of 2.4 GHz.

Fluid Dynamic Assembly of Semiconductor Blocks for Heterogeneous Integration

We have studied the fluidic assembly (FA) technique for heterogeneous integration. In this technique, device blocks, the size of which ranges from a few tens of microns to a few hundreds of microns, are arranged onto another material substrate in fluid. Here, we propose a novel technique to improve FA, called fluid dynamic assembly (FDA), which employs fluid dynamic effects. In the FDA, a special structure is fabricated on the block, which stabilizes the posture of the blocks falling in the fluid. This can be used to control the face of assembled blocks. In this paper, the feasibility of the FDA is discussed on the basis of fluid dynamic simulation and experiments. The numerical simulations revealed that the face control can be carried out for the block having ringlike (O-type) structures on it. Then we carried out the FDA experiments using thin disk-shaped GaAs blocks with O-type structure, and demonstrated an 87% face control ratio for the blocks with 7.5-µm-thick structure. Moreover, the less symmetric C-type structure was examined, and demonstrated even a high face control ratio of 96%.

Behaviors of flexible vertically aligned carbon nanotube bumps under compression

In this research, bump-shaped Vertically Aligned Mutli-walled Carbon Nanotubes (VACNTs) were bonded to Au substrate as flip-chip interconnect, and the behaviors of the VACNT bumps under compression pressure were studied. In this model, it is considered that the VACNTs were deformed permanently by the friction among the VACNTs. In order to solve the cause of the permanent deformation of the VACNT bumps, the friction among the CNTs during the compression is calculated. Furthermore, the resistance of the VACNT bumps is measured, considering the amount of the deformation of the VACNT bumps.

Surface activated bonding and transfer of Carbon Nanotube bumps to Au substrates

In this research, bump-shaped Vertically Aligned Mutli-walled Carbon Nanotubes (CNTs) were bonded to Au substrate as multilayer interconnect. In order to lower interconnect resistance between the CNT bumps and the Au substrate, the CNT bumps were covered with Au layer by Ar magnetron sputter, subsequently the CNT bumps and the Au substrates were bonded by surface activated bonding using Ar plasma. As a result, the resistance of CNT bumps including interconnect resistance between them was achieved ~10-3 Ω, that was equivalent value with conventional solder alloy.

Surface Activated Bonding between Au layer and vertically aligned Multi-Wall Carbon Nanotubes

In this research, vertically aligned Muti-Walled Carbon Nanotubes (CNTs) and Au-layer were bonded by Surface Activated Bonding method. Vertically aligned CNTs were grown by acetylene-CVD with Fe catalyst and were formed bump shape with 200 µm diameter and around 200 µm height. These CNT bumps and Au layer were cleaned and activated by Argon Fast Atom Beam (Ar-FAB) process and bonded with some load. As a result, MWNTs-Au bonding was succeeded on condition that CNT bumps and Au layer were Ar-FAB processed longer than 300 sec, and bonding pressure was larger than 0.17 MPa, and the average resistance of CNT was 130 kΩ. Furthermore, when the bonding pressure was 0.7 MPa, the average resistance of one was 16 Ω.

Electrical properties of flexible Vertically aligned Carbon Nanotube bumps under compression

In this research, bump-shaped Vertically Aligned Multi-walled Carbon Nanotubes (VA-CNTs) were bonded to Au substrate as flip-chip interconnect, and the behaviors of the VA-CNT bumps under compression pressure were studied. The resistance of the bonded VA-CNT bumps with load was decreased under compression pressure. In this model, it is considered that the VA-CNTs were deformed permanently by the friction among the VA-CNTs. In order to solve the cause of the permanent deformation of the VA-CNT bumps, the friction among the CNTs during the compression is calculated.

Graphene-gate transistors for gas sensing and threshold control

Graphene has been employed as gate electrodes of n-channel silicon transistors. When the graphene gate is exposed and gas molecules adsorb on the graphene surface, the work function of graphene changes depending on the gas species and concentrations, thus changing the threshold of the silicon transistor. This novel graphene-gate sensor exhibits sensitivities more than one order of magnitude higher than those of the conventional resistivity-based graphene gas sensors, easily detecting 7 ppb of NO2. The selectivity of several gases also exist. Furthermore, the work function of graphene-gate can be controlled by intentionally depositing proper doping materials on graphene, changing the threshold by up to 620 mV without degrading the subthreshold properties.

A 76–81 GHz high efficiency power amplifier for phased array automotive radar applications

This paper describes the implementation of 76-81 GHz power amplifier (PA) in 65 nm CMOS technology. A customized transistor model enables the designing circuits operating at mm-wave band. The output matching of the PA was composed of low-pass network to reduce both footprint and matching loss. This makes the PA ideal for phased array radars. The measured results at 79 GHz achieved the small signal gain of 25.1 dB, the saturated output power (Psat) of 11.5 dBm, and the power added efficiency (PAE) of 13.6% at the supply voltage of 0.8 V. These results agreed with the simulation.