Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Hiroyuki Kawai is active.

Publication


Featured researches published by Hiroyuki Kawai.


Information Processing Letters | 2001

Factorization of de Bruijn digraphs by cycle-rooted trees

Hiroyuki Kawai; Naohiro Fujikake; Yukio Shibata

In this paper, we introduce a new concept of an arc-coloring of digraphs called in-coloring. An in-coloring of an in-regular digraph induces a factorization into cycle-rooted trees; a cycle-rooted tree is a weakly connected digraph in which every vertex has indegree one. In particular, we study in-colorings of a line digraph. The results interpolate one-factorizations and tree factorizations of the de Bruijn digraph.


international symposium on quality electronic design | 2014

A 40-nm resilient cache memory for dynamic variation tolerance with bit-enhancing memory and on-chip diagnosis structures delivering ×91 failure rate improvement

Yohei Nakata; Yuta Kimi; Shunsuke Okumura; Jinwook Jung; Takuya Sawada; Taku Toshikawa; Makoto Nagata; Hirofumi Nakano; Makoto Yabuuchi; Hidehiro Fujiwara; Koji Nii; Hiroyuki Kawai; Hiroshi Kawaguchi; Masahiko Yoshimoto

This paper presents a resilient cache memory for dynamic variation tolerance in a 40-nm CMOS. The cache can perform sustained operations under a large-amplitude voltage droop. To realize sustained operation, the resilient cache exploit 7T/14T bit-enhancing SRAM and on-chip voltage/temperature monitoring circuit. 7T/14T bit-enhancing SRAM can reconfigure itself dynamically to a reliable bit-enhancing mode. An on-chip monitoring circuit can sense a precise supply voltage level of a power rail of the cache. The proposed cache can dynamically change its operation mode using the voltage/temperature monitoring result and can operate reliably under a large-amplitude voltage droop. Experimental result shows that it does not fail with 25% and 30% droop of Vdd and it provides 91 times better failure rate with a 35% droop of Vdd compared with the conventional design. The processor simulator shows that the proposed cache running in the bit-enhancing mode results in 2.88% IPC loss on average.


parallel and distributed computing: applications and technologies | 2009

Broadcasting Multiple Messages Using Cycle-Rooted Trees

Hiroaki Irino; Yuuki Tanaka; Hiroyuki Kawai; Shingo Osawa; Yukio Shibata

In information dissemination problem on interconnection networks, problems of broadcasting and gossiping have been widely studied. In this paper, we study the other problem, called multi-source broadcasting, defined as follows: there are some (but not all) vertices each of which has the unique item of information and needs to disseminate to every other vertex. This problem is located at an intermediate position between broadcasting and gossiping. We analyze the multi-source broadcasting problem on the cycle-rooted tree and the de Bruijn digraph as an interconnection network.


Information Processing Letters | 2007

Isomorphic factorization, the Kronecker product and the line digraph

Yuuki Tanaka; Hiroyuki Kawai; Yukio Shibata

In this paper, we investigate isomorphic factorizations of the Kronecker product graphs. Using these relations, it is shown that (1) the Kronecker product of the d-out-regular digraph and the complete symmetric digraph is factorized into the line digraph, (2) the Kronecker product of the Kautz digraph and the de Bruijn digraph is factorized into the Kautz digraph, (3) the Kronecker product of binary generalized de Bruijn digraphs is factorized into the binary generalized de Bruijn digraph.


IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 2006

Partitions, Functions and the Arc-Coloring of Digraphs

Hiroyuki Kawai; Yukio Shibata

Let f and g be two maps from a set E into a set F such that f(x) ≠ g(x) for every x in E. Sahili [8] has shown that, if min{|f-1(z)|, |g-1(z)|} ≤ n for each z ∈ F, then E can be partitioned into at most 2n + 1 sets E1,..., E2n+1 such that f(Ei) g(Ei) = o for each i = 1,..., 2n + 1. He also asked if 2n + 1 is the best possible bound. By using Sahilis formulation of the problem in terms of the chromatic number of line digraphs, we improve the upper bound from 2n + 1 to O(log n). We also investigate extended version for more than two maps.


IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 2003

Transmit power and window control to reduce inter-user interference in CDMA cellular packet systems

Hiroyuki Kawai; Shinzo Ohkubo; Toru Otsu; Hirohito Suda; Yasushi Yamao


IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 2002

The Chromatic Number and the Chromatic Index of de Bruijn and Kautz Digraphs

Hiroyuki Kawai


IEICE Transactions on Electronics | 2002

A Programmable Geometry Processor with Enhanced Four-Parallel SIMD Type Processing Core for PC-Based 3D Graphics

Hiroyuki Kawai; Yoshitsugu Inoue; Junko Kobara; Robert Streitenberger; Hiroaki Suzuki; Hiroyasu Negishi; Masatoshi Kameyama; Kazunari Inoue; Yasutaka Horiba; Kazuyasu Fujishima


IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 2001

Novel VLIW Code Compaction Method for a 3D Geometry Processor

Hiroaki Suzuki; Hiroyuki Kawai; Hiroshi Makino; Yoshio Matsuda


FIT2003 Information Technology Letters | 2003

On the arc-coloring of digraphs

Hiroyuki Kawai

Collaboration


Dive into the Hiroyuki Kawai's collaboration.

Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Hirohito Suda

Yokohama National University

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Hiroshi Makino

Osaka Institute of Technology

View shared research outputs
Researchain Logo
Decentralizing Knowledge