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Dive into the research topics where Hiroyuki Motozuka is active.

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Featured researches published by Hiroyuki Motozuka.


symposium on vlsi circuits | 2015

A 60GHz wireless transceiver employing hybrid analog/digital beamforming with interference suppression for multiuser gigabit/s radio access

Koji Takinami; Naganori Shirakata; Koichiro Tanaka; Takayuki Tsukizawa; Hiroyuki Motozuka; Yohei Morishita; Kenji Miyanaga; Takenori Sakamoto; Tomoya Urushihara; Masashi Kobayashi; Hiroshi Takahashi; Masataka Irie; Hiroyuki Yoshikawa; Atsushi Yoshimoto; Masatake Irie; Maki Nakamura; Takeaki Watanabe; Hiroshi Komori; Noriaki Saito

This paper presents a 60GHz analog/digital beamforming transceiver that effectively suppresses interference signals, targeting WiGig/IEEE 802.11ad standard. A prototype has been built with 40nm CMOS analog front-ends as well as offline baseband digital signal processing. Measurement shows 3.1dB EVM advantage over the conventional two-stream diversity during a packet collision situation.


ieee global conference on signal and information processing | 2015

A 6.16Gb/s 4.7pJ/bit/iteration LDPC decoder for IEEE 802.11ad standard in 40nm LP-CMOS

Hiroyuki Motozuka; Naoya Yosoku; Takenori Sakamoto; Takayuki Tsukizawa; Naganori Shirakata; Koji Takinami

This paper presents an LDPC decoder employing a column-parallel architecture that enables low-power and high-speed operation suitable for the 802.11ad standard. As compared to the conventional row-parallel architecture, the proposed architecture reduces the required memory size by 60% and also minimizes the number of pipeline stages for high throughput operation. Fabricated in 40nm LP CMOS technology, the prototype achieves high energy efficiency of 4.7pJ/bit/iteration for 6.16Gb/s while supporting all the modulation and coding schemes (MCS0 to MCS12) required for the 802.11ad single-carrier (SC) modulation.


ieee conference on standards for communications and networking | 2016

IEEE 802.11ad/WiGig based millimeter-wave small cell systems with adjacent channel interference suppression

Masashi Kobayashi; Hiroyuki Motozuka; Tomoya Urushihara; Naganori Shirakata; Koji Takinami

This paper presents a study on adjacent channel interference in millimeter-wave small cell systems based on IEEE 802.11ad/WiGig. It includes hardware prototype development, interference measurements, and performance evaluation of an interference suppression technique. The access point prototype employs three RF modules with 120° beam steering capability, thus enabling 360° coverage. Using the developed prototype, interference measurements were performed and the packet error degradation due to adjacent channel interference was observed. To mitigate the performance degradation, an interference suppression technique using a two stream receiver architecture was applied. The subsequent measurements showed improvement in EVM and also expansion of the cells coverage area, demonstrating the effectiveness of the applied technique for small cell systems using IEEE 802.11ad/WiGig.


international solid-state circuits conference | 2013

A fully integrated 60GHz CMOS transceiver chipset based on WiGig/IEEE802.11ad with built-in self calibration for mobile applications

Noriaki Saito; Takayuki Tsukizawa; Naganori Shirakata; Tadashi Morita; Koichiro Tanaka; Junji Sato; Yohei Morishita; Masaki Kanemaru; Ryo Kitamura; Takahiro Shima; Toshifumi Nakatani; Kenji Miyanaga; Tomoya Urushihara; Hiroyuki Yoshikawa; Takenori Sakamoto; Hiroyuki Motozuka; Yoshinori Shirakawa; Naoya Yosoku; Akira Yamamoto; Ryosuke Shiozaki; Koji Takinami


Archive | 2004

Disaster prediction system

Ryutaro Yamanaka; Hiroyuki Motozuka; Mitsuru Uesugi


Archive | 2006

Parallel interleaver, parallel deinterleaver, and interleave method

Hiroyuki Motozuka


Archive | 2008

RUNNING CYCLIC REDUNDANCY CHECK OVER CODING SEGMENTS

Alexander Golitschek Edler Von Elbwart; Hiroyuki Motozuka


Archive | 2004

Software radio equipment and software download method thereof

Hiroyuki Motozuka; 裕幸 本塚


Archive | 2007

SOFT OUTPUT DECODER, ITERATIVE DECODER, AND SOFT DECISION VALUE CALCULATING METHOD

Hiroyuki Motozuka


Archive | 2003

Disaster forecasting system

Hiroyuki Motozuka; Mitsuru Uesugi; Riyuutarou Yamanaka; 充 上杉; 隆太朗 山中; 裕幸 本塚

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