Takayuki Tsukizawa

An 84 dB-gain-range and 1 GHz-bandwidth variable gain amplifier using gain flattening capacitors for multi-gigabit radio

A 1 GHz wide-bandwidth digitally-controlled variable gain amplifier (VGA) with 84 dB wide gain range is presented for 60 GHz short range wireless systems. The VGA employs digitally-controlled resistors and gain flattening capacitors (GFCs) which improve in-band gain flatness. The VGA is fabricated in 90 nm CMOS. The measured result shows 84.3 dB gain tuning range from -25.3 dB to 59 dB with a 3 dB bandwidth of 1.0 GHz.

A 60GHz wireless transceiver employing hybrid analog/digital beamforming with interference suppression for multiuser gigabit/s radio access

This paper presents a 60GHz analog/digital beamforming transceiver that effectively suppresses interference signals, targeting WiGig/IEEE 802.11ad standard. A prototype has been built with 40nm CMOS analog front-ends as well as offline baseband digital signal processing. Measurement shows 3.1dB EVM advantage over the conventional two-stream diversity during a packet collision situation.

A PVT-variation tolerant fully integrated 60 GHz transceiver for IEEE 802.11ad

A PVT tolerant fully integrated 60 GHz transceiver for IEEE 802.11ad is presented. By introducing a newly proposed self-sensing LDO, the transceiver adjusts bias currents and the LDO output voltage for the PA to minimize the output power variation while relaxing the hot carrier injection (HCI) degradation. The measurement shows excellent robustness against PVT variations, demonstrating only 5 dB output power variation over -20 °C to 85 °C across process corners.

ISO-less, SAW-less open-loop polar modulation transceiver for 3G/GSM/EDGE multi-mode/multi-band handset

In this paper, a new 3G/GSM/EDGE multi-mode/multi-band transceiver that achieves both the elimination of TX-SAW filter and the isolator using an open-loop polar modulation transmitter is presented. Sufficient ACLR performance is accomplished by a combination of parts-to-parts calibration and temperature offset compensation. ACLR meets 3GPP target specification at VSWR=3∶1, with Rx band noise at PA output in UMTS band I of −132.3dBm/Hz thus does not degrade receiver sensitivity. This paper includes design details and experimental results.

A Novel Parasitic-Aware Synthesis and Verification Flow for RFIC Design

The design of radio-frequency integrated circuits (RFICs) is highly sensitive to layout parasitics. In conventional methodologies, the layout parasitics are known only after the layout is complete and the schematic is resized to compensate for these parasitics. The drawback of such a methodology is that the convergence of this design iteration remains unpredictable. This paper proposes a novel synthesis and verification flow for RFIC designs. The design flow is composed of three stages: circuit sizing with floorplan, performance-aware floorplan refinement, and full-wave electromagnetic (EM) extraction. Layout parasitics are considered throughout the design flow in the proposed methodology. As a result, parasitic closure can be achieved quickly and design iterations may not be required. As an example, the proposed design flow is applied to a cross-coupled inductance-capacitance (LC) VCO. Demonstrating the efficiency of the proposed flow for RFIC designs, it required only two weeks to meet all the design specifications with no iterations

A 6.16Gb/s 4.7pJ/bit/iteration LDPC decoder for IEEE 802.11ad standard in 40nm LP-CMOS

This paper presents an LDPC decoder employing a column-parallel architecture that enables low-power and high-speed operation suitable for the 802.11ad standard. As compared to the conventional row-parallel architecture, the proposed architecture reduces the required memory size by 60% and also minimizes the number of pipeline stages for high throughput operation. Fabricated in 40nm LP CMOS technology, the prototype achieves high energy efficiency of 4.7pJ/bit/iteration for 6.16Gb/s while supporting all the modulation and coding schemes (MCS0 to MCS12) required for the 802.11ad single-carrier (SC) modulation.