Holger Kapels

Dielectric charge traps. A new structure element for power devices

The progress in SOI technologies, especially SIMOX and Silicon Direct Bonding, suggests a new type of structural element which could improve device blocking behavior in various aspects. A novel structure element for realizing high breakdown voltages in power devices is analyzed using numerical simulations. We propose dielectric structures which in strong vertical fields collect majority or minority carriers. These structures enable surprising new solutions for various problems. Improved high voltage field plates, surface field reduced Schottky rectifiers, dynamic buffers and Ron improved unipolar devices can be achieved.

A novel control concept for high-efficiency power conversion with the bidirectional non-inverting buck-boost converter

This paper presents a novel control concept for the bidirectional non-inverting buck-boost converter to achieve extreme high-efficiency power conversion. The duty cycle, duty ratios and time delays of the PWM control signals for the switches are modulated depending on operating points to minimize the power losses in the converter. A 3kW prototype of the converter using SiC MOSFETs has been designed and tested for the verification of the control concept. Measurement results show that the prototype achieves power efficiency between 97.79% and 99.60% over a power range “input voltage from 300V to 500V, output voltage from 200V to 600V and output current from 1A to 5A”.

New 600V Lateral Superjunction Power MOSFETs Based on Embedded Non-Uniform Column Structure

New lateral power MOSFETs employing two different, non-uniform, column-shaped superjunction (SJ) structures are proposed for use in smart power ICs that require voltage ratings up to 600V. Using three-dimensional device simulations, the basic electrical characteristics of the new SJ MOSFETs have been evaluated, together with the effect of charge imbalance on the device performance. The simulation results show that the proposed devices exhibit excellent robustness against doping fluctuations, improve the specific on-resistance by as much as 47% compared to conventional RESURF LDMOS structures with similar voltage ratings, and can compete with existing other charge compensation devices

YFET - Trench superjunction process window extended

The drift zone of superjunction devices consists of compensated n- and p-columns. The manufacturability of such devices is based on the thorough control of acceptors and donator concentrations. Shrinking the cell pitch to a few micrometers requires considerably better compensation control compared to 10µm pitch devices. A new concept that applies a stack of Y-shaped field plates to a charge compensated device is investigated by numerical simulation. The YFET concept provides a 7 times larger compensation process window compared to a device with oxide filled trenches, allowing much higher doping concentrations. A specific on-resistance of 0.65Ωmm2 at a breakdown voltage of 680V can be achieved at a cell pitch of about 4.6µm.

A 600V 8.7Ohmmm 2 Lateral Superjunction Transistor

In this work we present for the first time experimental results and corresponding device simulations for high voltage lateral superjunction MOSFETs. We investigated experimentally various degrees of compensation for the lateral compensation structure and improved additionally the chip performance by optimizing the layout. We also realized different layouts in order to improve the chip performance. We show that a blocking voltage (BV) of 640V is achieved. Devices blocking above 600V achieve an on-resistance of 7.1Omega, which corresponds to a Rds,on times A of 8.7Omegamm2