Hsiao-Bin Liang

Wideband mixed lumped-distributed-element 90° and 180° power splitters on silicon substrate for millimeter-wave applications

This paper presents two millimeter-wave lumped-distributed 90deg and 180deg power splitters fabricated in the back-end-of-the-line (BEOL) of a 0.18 mum SiGe BiCMOS technology. The 180deg and 90deg power splitters based on mixed lumped-distributed-element three-port Wilkinson power divider with phase shifters at the outputs are shown to achieve an amplitude balance of better than 0.05 dB and 0.21 dB, respectively, at 77 GHz. The return losses for both power splitters are better than 12 dB from 70 GHz to 80 GHz. The effective areas of the 180deg and 90deg splitters are 240 times 440 mum2 and 220 times 400 mum2, respectively.

A high quality factor and low power loss micromachined RF bifilar transformer for UWB RFIC applications

In this letter, the authors demonstrate that high quality factor and low power loss transformers can be obtained by using the CMOS process-compatible backside inductively coupled plasma (ICP) deep-trench technology to selectively remove the silicon underneath the transformers. A 62.4% (from 8.99 to 14.6) and a 205.8% (from 8.6 to 26.3) increase in the Q-factor, a 10.3% (from 0.697 to 0.769) and a 30.2% (from 0.652 to 0.849) increase in the maximum available power gain (GAmax), and a 0.43- (from 1.57 to 1.14 dB) and a 1.15-dB (from 1.86 to 0.71 dB) reduction in the minimum noise figure (NFmin ) were achieved at 5.2 and 10 GHz, respectively, for a bifilar transformer with overall dimension of 240times240 mum2 after the backside ICP etching. The values of GAmax of 0.769 and 0.849 are both state-of-the-art results among all reported on-chip bifilar transformers. These results indicate that the backside ICP deep-trench technology is very promising for high-performance radio frequency integrated circuit applications

Temperature-dependence of noise figure of monolithic RF transformers on a thin (20 /spl mu/m) silicon substrate

We demonstrate an analysis of the effect of temperature (from -45/spl deg/C to 175/spl deg/C) on the quality-factor (Q-factor) and noise figure (NF) performances of monolithic RF transformers on both normal (750 /spl mu/m) and thin (20 /spl mu/m) silicon substrates. The results show that silicon substrate thinning is effective in improving the Q-factor and NF performances of transformers. In addition, Q-factors of both primary and secondary coils decrease with increasing temperature but show a reverse behavior within a higher frequency range. The noise figure (NF) increases with increasing temperature. The present analysis enables RF engineers to understand more deeply the NF (i.e. power loss) behavior of RF monolithic transformers fabricated on a silicon substrate, and hence is helpful for them in designing less temperature-sensitive low-supply-voltage transformer-feedback low-noise-amplifiers (LNA) and voltage-controlled-oscillators (VCO), and other radio-frequency integrated circuits (RF-ICs) which include transformers.

Ultralow-Loss and Broadband Micromachined Transmission Line Inductors for 30–60 GHz CMOS RFIC Applications

In this paper, for the first time, we demonstrate that ultralow-loss and broadband transmission line (TL) inductors can be obtained by using the CMOS-process compatible backside inductively coupled-plasma (ICP) deep-trench technology to selectively remove the silicon underneath the TL inductors. The results show that a 112.8% (from 14.37 to 30.58) and a 201.1% (from 6.33 to 19.06) increase in Q-factor, a 9.7% (from 0.91 to 0.998) and a 28.3% (from 0.778 to 0.998) increase in maximum available power gain GAmax, and a 0.404-dB (from 0.412 to 7.6times10-3 dB) and a 1.082-dB (from 1.09 to 8.4times10-3 dB) reduction in minimum noise figure NFmin were achieved at 30 and 60 GHz, respectively, for a 162.2 pH TL inductor after the backside ICP dry etching. The state-of-the-art performances of the on-chip TL inductors-on-air suggest that they are very suitable for application to realize ultralow-noise 30-60-GHz CMOS radio-frequency integrated circuit. In addition, the CMOS-process compatible backside ICP etching technique is very promising for system-on-a-chip applications.

A High-Performance Micromachined RF Monolithic Transformer With Optimized Pattern Ground Shields (OPGS) for UWB RFIC Applications

In this brief, we demonstrate that high-quality-factor and low-power-loss transformers can be obtained if the optimized pattern ground shields (OPGS) of polysilicon is adopted and the CMOS process-compatible backside inductively coupled-plasma (ICP) deep-trench technology is used to selectively remove the silicon underneath the transformers completely. OPGS means that the redundant PGS of a traditional complete PGS, which is right below the spiral metal lines of the transformer, is removed for the purpose of reducing the large parasitic capacitance. The results show that, if the OPGS was adopted and the backside ICP etching was done, a 69.3% and a 253.6% increase in quality factor, a 10.5% and a 14% increase in magnetic-coupling factor (kIm), a 17.2% and a 51.1% increase in maximum available power gain (GAmax), and a 0.682- and a 1.79-dB reduction in minimum noise factor (NFmin) were achieved at 5 and 8 GHz, respectively, for a bifilar transformer with an overall dimension of 230times215 mum2

A Broadband Millimeter-Wave Low-Noise Amplifier in SiGe BiCMOS Technology

A broadband millimeter-wave low-noise amplifier (LNA) operating at V-band (50 GHz to 75 GHz) is presented. The circuit is fabricated with 0.18 mum SiGe BiCMOS technology. The matching networks are synthesized with microstrip transmission lines. The LNA achieves a maximum transducer power gain |S21| of ~16 dB, a noise figure of 6.8 dB at 62 GHz, and a 3-dB bandwidth from 54 GHz to 70 GHz. The output return loss is better than 12 dB from 59 GHz to 72 GHz. The reverse isolation |S12| is better than 40 dB over the 3-dB bandwidth. The LNA draws 9.6 mA from a 2.5 V supply.

Characterization and modeling of 100 nm RF generic CMOS and 500 nm RF power CMOS

In this paper, we propose a new wide-band RF-CMOS model, which includes a complete silicon substrate network. A method to extract every parameter of this model is also developed. Excellent agreement between measurement and simulation up to 40 GHz is achieved for 100 nm and 500 nm CMOS devices under study. In addition, the kink phenomenon (anomalous dip) of scattering parameters S/sub 11/ and S/sub 22/ that usually appears in leading-edge RF CMOS devices with sub-130 nm gate-length or RF power CMOS devices is quantitatively analyzed for the first time.

Optimization of PGS pattern of transformers/inductors in standard RF BiCMOS technology for RFIC applications

In this paper, a polysilicon PGS (pattern ground shield) pattern, which located exactly inside and outside the spiral metal wires of the RF transformers/ inductors in standard RF BiCMOS technology, was demonstrated. The proposed PGS pattern can effectively improve the drawback, i.e. large parasitics between the transformers/inductors and the PGS pattern, due to no direct overlap between them. The results show a 56.5% (from 6.12 to 9.58) and a 55.7% (from 5.55 to 8.64) increase in Q factor, a 18.2 % (from 0.67 to 0.79) and a 21.4% (from 0.66 to 0.8) increase in GAmax, a 0.73 dB (from 1.74 dB to 1.01 dB) and a 0.85 dB (from 1.82 dB to 0.97 dB) decrease in NFmin, and a 18.4% (from 0.69 to 0.82) and a 21.2% (from 0.69 to 0.83) increase in magnetic-coupling factor kim were achieved at 4.2 and 5.2 GHz, respectively, for a bifilar transformer with an overall dimension 230 times 215 mum2 in standard BiCMOS process with substrate thickness of 318 mum, and substrate resistance of 10 Omega-cm. Furthermore, compared with the traditional PGS pattern, a 9.9% (from 10.1 GHz to 11.1 GHz) increase in resonant frequency fSR was achieved. These results means the proposed PGS pattern is very help for RF engineers to design high-performance RF transformers for ultra-low-voltage high-performance transformer-feedback LNAs and VCOs, and other RF-ICs which include transformers for SOC applications

Implementation of Perfect-Magnetic-Coupling Ultra-Low-Loss Transformer in Standard RFCMOS Technology

In this paper, we propose a single-turn multiple-layer interlaced stacked transformer structure with nearly perfect magnetic-coupling factor (kIM∼ 1) using standard mixed-signal/RF CMOS (or BiCMOS) technology. A single-turn six-layer interlaced stacked transformer was implemented to demonstrate the proposed structure. Temperature dependence (from -25 °C to 175°C) of the quality-factor (Q-factor), kIm, resistive-coupling factor (kRe), maximum available power gain (GAmax), and minimum noise figure (NFmin) performances of the transformer are reported. State-of-the-art GAmaxof 0.762 and 0.904 (i.e. NFminof 1.181 dB and 0.437 dB) have been achieved at 5.2 GHz and 8 GHz, respectively, at room temperature, mainly due to the perfect magnetic-coupling factor and the high resistive-coupling factor. The present analysis is helpful for RF engineers to design ultra-low-voltage high-performance transformer-feedback LNAs and VCOs, and other RF-ICs which include transformers.

Characterization and Modeling of Pattern Ground Shield and Silicon-Substrate Effects on Radio-Frequency Monolithic Bifilar Transformers for Ultra-Wide Band Radio-Frequency Integrated Circuit Applications

In this paper, an analysis of the effects of pattern-ground-shield (PGS) and silicon-substrate on the performances of RF monolithic bifilar transformers are demonstrated. It was found that high-quality-factor and low-power-loss transformers can be obtained if the optimized PGS (OPGS) of polysilicon is adopted and the complementary metal–oxide–semiconductor (CMOS)-process compatible backside inductively-coupled-plasma (ICP) deep trench technology is used to selectively remove the silicon underneath the transformers completely. OPGS means that the redundant PGS of a traditional complete PGS (CPGS), which is right below the spiral metal lines of the transformer, is removed for the purpose of reducing the large parasitic capacitance. The results show that, if the OPGS was adopted and the backside ICP etching was done, a 253.6% (from 3.79 to 13.4) increase in Q-factor, a 14% (from 0.7 to 0.798) increase in magnetic-coupling factor (kIm), a 51.1% (from 0.55 to 0.831) increase in maximum available power gain (GAmax), and a 1.79 dB (from 2.597 to 0.807) reduction in minimum noise factor (NFmin) were achieved at 8 GHz for a bifilar transformer with an overall dimension of 230×215 µm2.