Hsin-Chou Liu

Improved memory window for Ge nanocrystals embedded in SiON layer

The formation of germanium Ge nanocrystals embedded in silicon oxygen nitride SiON is proposed for charge storage elements in this work. The Ge nanocrystals can be nucleated after the oxidation process of silicon germanium nitride SiGeN layer at high temperatures. Compared to the control samples of Ge nanocrystals/SiO2/Si structure and SiON/Si stack memory, the proposed Ge nanocrystals/SiON/Si memory obtained superior memory window, even larger than the typical sum of both. It is considered that the extra interface trap states between Ge and SiON film were generated as Ge nanocrystals were embedded in SiON layer.

Formation of germanium nanocrystals embedded in silicon-oxygen-nitride layer

The formation of germanium nanocrystals embedded in silicon-oxygen nitride with distributed charge storage elements is proposed in this work. A large memory window is observed due to isolated Ge nanocrystals in the SiON gate stack layer. The Ge nanocrystals were nucleated after high temperature oxidized SiGeN layer. The nonvolatile memory with the Ge nanocrystals embedded in SiON stack layer exhibits 4V threshold voltage shift under 10V write operation. Also, the manufacture technology using the sequent high-temperature oxidation of the a-Si layer acting as the blocking oxide is proposed to enhance the performance of nonvolatile memory devices.

Enhanced Performance of Poly-Si Thin Film Transistors Using Fluorine Ions Implantation

Enhanced Performance of Poly-Si Thin Film Transistors Using Fluorine Ions Implantation Chun-Hao Tu, Ting-Chang Chang,* Po-Tsun Liu, Hsiao-Wen Zan, Ya-Hsiang Tai, Che-Yu Yang, Yung-Chun Wu, Hsin-Chou Liu, Wei-Ren Chen, and Chun-Yen Chang Institute of Electronics, National Chiao Tung University, Taiwan Department of Physics and Institute of Electro-Optical Engineering, Center for Nanoscience, Nanotechnology, National Sun Yat-sen University, Kaohsiung Taiwan National Nano Device Laboratories, Taiwan

Electrical Enhancement of Solid Phase Crystallized Poly-Si Thin-Film Transistors with Fluorine Ion Implantation

Solid phase recrystallized polycrystalline silicon thin-film transistors (SPC poly-Si TFTs) with fluorine ion implantation were investigated in this study. Electrical characteristics and reliability of the proposed poly-Si TFTs were improved effectively, especially for field effect mobility and off current. The fluorine-ion-implanted poly-Si TFT can suppress the hot carrier multiplication near the drain side, leading to superior endurance to electrical stress compared with conventional poly-Si TFTs. It was found that fluorine ions will pile up at the poly-Si interface during thermal annealing, without the initial deposition of pad oxide. The proposed technology is manageable and compatible with conventional poly-Si TFT fabrication. As the ion dosages increase more than 5 X 10 15 cm -2 , however, the electrical characteristics of poly-Si TFTs were degraded due to the increase of trap state density caused by the fluorine segregation in the poly-Si film.

Improvement of electrical characteristics for fluorine-ion-implanted poly-Si TFTs using ELC

The fluorine ion implantation applied to the polycrystalline silicon thin-film transistors (poly-Si TFTs) is investigated in this letter. Experimental results have shown that fluorine ion implantation effectively minimized the trap state density, leading to superior electrical characteristics such as high field-effect mobility, low threshold voltage, and high ON/OFF current ratio. Furthermore, the fluorine ions tended to segregate at the interface between the gate oxide and poly-Si layers during the excimer laser annealing, even without the extra deposition of pad oxide on the poly-Si film. The presence of fluorine obviously enhanced electrical reliability of poly-Si TFTs.

Superior low-pressure-oxidized Si 3 N 4 films on rapid-thermal-nitrided poly-Si for high-density DRAM's

High-performance stacked storage capacitors with small effective-oxide-thickness (t/sub ox,eff/) as thin as 37 /spl Aring/ has been achieved using low-pressure-oxidized nitride films deposited on NH/sub 3/-nitrided poly-Si electrodes. The capacitors exhibit excellent leakage property and time-dependent dielectric-breakdown (TDDB) characteristics. Furthermore, this technique is promising for the 64- and 256-Mb dynamic-random-access-memory (DRAM) applications because the process temperatures never exceed 850/spl deg/C.<<ETX>>

A fabrication of germanium nanocrystal embedded in silicon-oxygen-nitride layer

The formation of germanium nanocrystals embedded in silicon-oxygen-nitride (SiON) layer acting as distributed charge storage elements is proposed in this work. A large memory window is observed due to the isolated Ge nanocrystals in the SiON gate stack layer. The Ge nanocrystals were nucleated after the high-temperature oxidation of SiGeN layer. The nonvolatile memory device with the Ge nanocrystals embedded in SiON stack layer exhibits 4 V threshold voltage shift under 7 V write operation. Also, the sequent high-temperature oxidation of the SiGeN layer acting as the blocking oxide is proposed to enhance the performance of nonvolatile memory devices..

Formation of Germanium Nanocrystals Embedded in a Silicon-Oxygen-Nitride Layer

The formation of germanium nanocrystals embedded in silicon-oxygen-nitride with distributed charge storage elements is proposed. A large memory window was observed due to isolated Ge nanocrystals in the SiON gate stack layer. The Ge nanocrystals were nucleated after a high-temperature oxidized SiGeN layer. The Ge nanocrystals embedded in the SiON stack layer exhibited nonvolatile memory characteristics with the obvious threshold voltage shift under a bidirectional voltage sweep. Also, the manufacturing technology using the sequent high-temperature oxidation of the a-Si layer and the direct oxidation of the SiGeN layer is proposed, respectively, for the formation of a blocking oxide layer to enhance the performance of nonvolatile memory devices. The reliability characteristics, including retention time and endurance, are also advisable for the application of nonvolatile memory device.

Formation of silicon germanium nitride layer with distributed charge storage elements

The formation of silicon germanium nitride (SiGeN) with distributed charge storage elements is proposed in this work. A large memory window is observed due to the retainable dangling bonds inside the SiGeN gate stack layer. The nonvolatile memory device with the high-temperature oxidized SiGeN stack layer exhibits 2V threshold voltage shift under 7V write operation, which is sufficient for a memory device to define the signal “0” and “1.” Also, the manufacture technology using the sequent high-temperature oxidation of the a-Si layer acting as the blocking oxide is proposed to enhance the performance of nonvolatile memory devices.

Novel tunneling dielectric prepared by oxidation of ultrathin rugged polysilicon for 5-V-only nonvolatile memories

A novel dielectric fabricated by thermal oxidation of ultrathin rugged polysilicon film is proposed for nonvolatile memories. Different roughness degrees for the top and bottom interfaces of this dielectric are detected by the atomic-force-microscopy (AFM) and high resolution transmission electron microscopy (HRTEM). Due to the microtips formed at the bottom interface of the dielectric, significant improvements in the high conduction efficiency, low trapping rate, good uniformity, and high reliability under positive gate-bias are obtained for the dielectric. Therefore, rugged polyoxide is promising for future 5-V-only floating-gate applications.