J. D. Benson

Growth and Analysis of HgCdTe on Alternate Substrates

Dislocations generated at the HgCdTe/CdTe(buffer layer) interface are demonstrated to play a significant role in influencing the crystalline characteristics of HgCdTe epilayers on alternate substrates (AS). A dislocation density >108xa0cm−2 is observed at the HgCdTe/CdTe interface. Networks of dislocations are generated at the HgCdTe/CdTe interface. The dislocation networks are observed to entangle. Significant dislocation reduction occurs within a few microns of the HgCdTe/CdTe interface. The reduction in dislocation density as a function of depth is enhanced by annealing. Etch pit density and x-ray diffraction full-width at half-maximum values increase as a function of the lattice mismatch between HgCdTe epilayer and the buffer layer/substrate. The experimental results suggest that only by reducing HgCdTe/CdTe lattice mismatch will the desired crystallinity be achieved for HgCdTe epilayers on AS.

Characterization of cross-hatch morphology of MBE (211) HgCdTe

We present the results of a detailed study of the nature and origin of cross-hatch patterns commonly observed on (211) HgCdTe epilayers deposited by molecular beam epitaxy. Cross-hatch patterns were examined using x-ray topography as well as Nomarski, interferometric, and atomic force microscopies. Cross-hatch patterns were generally comprised of three sets of lines, parallel to the [231],, [213], and [011] directions. The lines parallel to the [011] direction exhibited distinct properties compared to the two sets of lines parallel to [231] and [213]. Under growth conditions characterized by excessive Hg flux (low temperature), lines parallel to [011] were periodic and tended to dominate the cross-hatch pattern. In some cases, bands of dislocations, 10–100 m in width, formed parallel to [011]. Under optimized growth conditions, on very closely lattice-matched substrates, (dislocation densities <105 cm−2) lines parallel to [011] vanished entirely, and lines parallel to [231] and [213] became sparse. The remaining lines were typically fragments terminated by either a single dislocation, a cluster of dislocations (micro-void), or the wafers edge. The density of these line fragments tended to decrease as the dislocation density decreased. Under the best growth conditions on very closely lattice-matched substrates we have achieved dislocation densities of 5 104 cm−2, which is comparable to the dislocation density of the CdZnTe substrate.

Antireflective structures in CdTe and CdZnTe surfaces by ECR plasma etching

A rigorous coupled-wave analysis procedure has been used to design structures which can be embedded in Cd(Zn)Te surfaces to make them antireflective in the 8–14 m spectral region. Gray scale lithography was used to produce these patterns in photoresist layers. High fidelity transfer of patterns into Cd(Zn)Te surfaces was accomplished by utilizing an electron cyclotron resonance plasma with etch selectivity values in the range of 6.7–13.3. Transmission values at patterned surfaces were measured to be as high as 99.3%.

Challenges for third-generation cooled imagers

Third-Generation, two-color infrared cooled sensors are being developed in order to allow the Army to detect and identify enemy forces at ranges beyond that at which the enemy can detect them. This will ensure that the Army continues to own night operations. Developing the technology needed to field these high-performance third-generation cooled imagers poses many challenges to the infrared community. These devices, which are expected to provide high spatial and temporal resolution simultaneously in two-to-three infrared bands, will dramatically increase the ability to find targets in defilade, and will be a major technological breakthrough. Performance has to be close to the theoretical limit, dominated by the limits of photon noise. Cost is also a major factor if sufficient numbers of such sensors are to be fielded. The benefits of this technology are now described, followed by a summary of the challenges faced in meeting the cost and performance objectives.

Cross-Sectional Study of Macrodefects in MBE Dual-Band HgCdTe on CdZnTe

HgCdTe dual-band mid-wave infrared/long-wave infrared focal-plane arrays on CdZnTe are a key component in advanced electrooptic sensor applications. Molecular beam epitaxy (MBE) has been used successfully for growth of dual-band layers on larger CdZnTe substrates. However, the macrodefect density, which is known to reduce the pixel operability and its run-to-run variation, is larger when compared with layers grown on Si substrate. This paper reports the macrodefect density versus size signature of a well-optimized MBE dual-band growth and a cross-sectional study of a macrodefect that represents the most prevalent class using focused ion beam, scanning transmission electron microscopy, and energy-dispersive x-ray spectroscopy. The results show that the macrodefect originates from a void, which in turn is associated with a pit on the CdZnTe substrate.

Impact of Tellurium Precipitates in CdZnTe Substrates on MBE HgCdTe Deposition

State-of-the-art (112)B CdZnTe substrates were examined for near-surface tellurium precipitate-related defects. The Te precipitate density was observed to be fairly uniform throughout the bulk of the wafer, including the near-surface region. After a molecular beam epitaxy (MBE) preparation etch, exposed Te precipitates, small pits, and bumps on the (112)B surface of the CdZnTe wafer were observed. From near-infrared and dark field microscopy, the bumps and small pits on the CdZnTe surface are associated with strings of Te precipitates. Raised bumps are Te precipitates near the surface of the (112)B CdZnTe where the MBE preparation etch has not yet exposed the Te precipitate(s). An exposed Te precipitate sticking above the etched CdZnTe surface plane occurs when the MBE preparation etch rapidly undercuts a Te precipitate. Shallow surface pits are formed when the Te precipitate is completely undercut from the surrounding (112)B surface plane. The Te precipitate that was previously located at the center of the pit is liberated by the MBE preparation etch process.

Reduction of Dislocation Density by Producing Novel Structures

HgCdTe, because of its narrow band gap and low dark current, is the infrared detector material of choice for several military and commercial applications. CdZnTe is the substrate of choice for HgCdTe as it can be lattice matched, resulting in low-defect-density epitaxy. Being often small and not circular, layers grown on CdZnTe are difficult to process in standard semiconductor equipment. Furthermore, CdZnTe can often be very expensive. Alternate inexpensive large circular substrates, such as silicon or gallium arsenide, are needed to scale HgCdTe detector production. Growth of HgCdTe on these alternate substrates has its own difficulty, namely large lattice mismatch (19% for Si and 14% for GaAs). This large mismatch results in high defect density and reduced detector performance. In this paper we discuss ways to reduce the effects of dislocations by gettering these defects to the edge of a reticulated structure. These reticulated surfaces enable stress-free regions for dislocations to glide to. In this work, a novel structure was developed that allows for etch pit density of less than 4xa0×xa0105/cm2 for HgCdTe-on-Si. This is almost two orders of magnitude less than the as-grown etch pit density of 1.1xa0×xa0107/cm2. This value of 3.35xa0×xa0105/cm2 is below the <1xa0×xa0106/cm2 or even the better <5xa0×xa0105/cm2 target for this research, making HgCdTe-on- alternate substrate density much more like that of HgCdTe-on-CdZnTe.

A Review of the Characterization Techniques for the Analysis of Etch Processed Surfaces of HgCdTe and Related Compounds

HgCdTe is the material system of choice for many infrared sensing applications. Growth of this material can often be challenging. However, processing of this material system can be equally as challenging. Incorrect processing can cause shunting, surface inversion, or high surface recombination velocities that can be detrimental. In order to produce an effective device in HgCdTe, one needs to understand what happens to the HgCdTe surface. Factors like the chemical termination of the HgCdTe surface, surface roughness, and surface reconstruction after a process is performed can dramatically affect the performance of devices made with HgCdTe. We will review different surface characterization techniques and how these techniques can be used conventionally and unconventionally, and how different processes can affect the surfaces of HgCdTe and related compounds.

As-Received CdZnTe Substrate Contamination

State-of-the-art as-received (112)B CdZnTe substrates were examined for surface impurity contamination, polishing damage, and tellurium precipitates/inclusions. A maximum surface impurity concentration of Alxa0=xa07.5xa0×xa01014, Sixa0=xa03.7xa0×xa01013, Clxa0=xa03.12xa0×xa01015, Sxa0=xa01.7xa0×xa01014, Pxa0=xa07.1xa0×xa01013, Fexa0=xa01.0xa0× xa01013, Brxa0=xa01.9xa0×xa01012, and Cuxa0=xa04xa0×xa01012 atoms cm−2 was observed on an as-received 6xa0×xa06xa0cm wafer. As-received CdZnTe substrates have scratches and residual polishing grit on the (112)B surface. Polishing scratches are 0.3xa0nm in depth and 0.1xa0μm wide. The polishing grit density was observed to vary from wafer-to-wafer from ∼5xa0×xa0106 to 2xa0×xa0108 cm−2. Te precipitate/inclusion size and density was determined by near-infrared automated microscopy. A Te precipitate/inclusion diameter histogram was obtained for the near-surface (top ~140xa0μm) of a 6xa0×xa06xa0cm substrate. The average areal Te precipitate/inclusion density was observed to be fairly uniform. However, there was a large density of Te precipitates/inclusions with a diameter significantly greater than the mean. Te precipitate/inclusion density >10xa0μm diameterxa0=xa02.8xa0×xa0103 cm−3. The large Te precipitates/inclusions are laterally non-uniformly distributed across the wafer.

Understanding the Evolution of CdTe Buffer Layer Surfaces on ZnTe/Si(211) and GaAs(211)B During Cyclic Annealing

We present the results of a detailed study of the changes that occur on CdTe buffer layer surfaces grown on ZnTe/Si(211) and GaAs(211)B during the routine thermal cyclic annealing (TCA) process. Observations indicate that CdTe buffer layer surfaces are Te saturated when the TCA is performed under Te overpressure. In the absence of Te flux during the TCA step, the CdTe surface loses CdTe congruently and the typical CdTe nanowires show the presence of nodules on their surfaces. The observed changes in reflection high-energy electron diffraction patterns during TCA are explained in terms of surface chemistry and topography observations. Overall, the Te overpressure is necessary to maintain a smoother and pristine surface to continue the molecular beam epitaxy (MBE) growth.