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Dive into the research topics where M. F. Vilela is active.

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Featured researches published by M. F. Vilela.


Infrared Technology and Applications XXX | 2004

Wide-FOV FPAs for a shipboard distributed aperture system

David J. Gulbransen; Stephen H. Black; A. C. Childs; Christopher L. Fletcher; S. M. Johnson; W. A. Radford; G. M. Venzor; J. P. Sienicki; A. D. Thompson; J. H. Griffith; A. A. Buell; M. F. Vilela; M. D. Newton; Edward H. Takken; James R. Waterman; Keith Krapels

The Navy faces an ever evolving threat scenario, ranging from sub-sonic sea skimming cruise missiles to newer, unconventional threats such as that experienced by the USS Cole. Next generation naval technology development programs are developing “stealthy” ships by reducing a ships radar cross section and controlling electromagnetic emissions. To meet these threat challenges in an evolving platform environment, ONR has initiated the “Wide Aspect MWIR Array” program. In support of this program, Raytheon Vision Systems (RVS) is developing a 2560 X 512 element focal plane array, utilizing Molecular Beam Epitaxially grown HgCdTe on silicon detector technology. RVS will package this array in a sealed Dewar with a long-life cryogenic cooler, electronics, on-gimbal power conditioning and a thermal reference source. The resulting sub system will be a component in a multi camera distributed aperture situation awareness sensor, which will provide continuous surveillance of the horizon. We will report on the utilization of MWIR Molecular Beam Epitaxial HgCdTe on Silicon material for fabrication of the detector arrays. Detector arrays fabricated on HgCdTe/Si have no thermal expansion mismatch relative to the readout integrated circuits. Therefore large-area focal plane arrays (FPAs) can be developed without concern for thermal cycle reliability. In addition these devices do not require thinning or reticulation like InSb FPAs to yield the high levels of Modulation Transfer Function (MTF) required by a missile warning sensor. HgCdTe/Si wafers can be scaled up to much larger sizes than the HgCdTe/CdZnTe wafers. Four-inch-diameter HgCdTe/Si wafers are currently being produced and are significantly larger than the standard 1.7 inch x 2.6 inch HgCdTe/CdTe wafers. The use of Si substrates also enables the use of automated semiconductor fabrication equipment.


Proceedings of SPIE | 2012

High operating temperature mid-wavelength infrared HgCdTe photon trapping focal plane arrays

K. D. Smith; Justin Gordon Adams Wehner; Roger W. Graham; J. E. Randolph; A. M. Ramirez; G. M. Venzor; K.R. Olsson; M. F. Vilela; E. P. G. Smith

This paper investigates arrays of HgCdTe photon trapping detectors. Performance of volume reduced single mesas is compared to volume reduced photon trap detectors. Good agreement with model trends is observed. Photon trap detectors exhibit improved performance compared to single mesas, with measured noise equivalent temperature difference (NEDT) of 40 mK and 100 mK at temperatures of 180 K and 200 K, with good operability. Performance as a function of temperature has also been investigated.


Journal of Electronic Materials | 2014

Impact of Tellurium Precipitates in CdZnTe Substrates on MBE HgCdTe Deposition

J. D. Benson; L. O. Bubulac; P. J. Smith; R. N. Jacobs; J. K. Markunas; M. Jaime-Vasquez; L. A. Almeida; A. J. Stoltz; Priyalal S. Wijewarnasuriya; G. Brill; Y. Chen; J. M. Peterson; M. Reddy; M. F. Vilela; S. M. Johnson; D. D. Lofgreen; A. Yulius; G. Bostrup; M. Carmody; D. Lee; S. Couture

State-of-the-art (112)B CdZnTe substrates were examined for near-surface tellurium precipitate-related defects. The Te precipitate density was observed to be fairly uniform throughout the bulk of the wafer, including the near-surface region. After a molecular beam epitaxy (MBE) preparation etch, exposed Te precipitates, small pits, and bumps on the (112)B surface of the CdZnTe wafer were observed. From near-infrared and dark field microscopy, the bumps and small pits on the CdZnTe surface are associated with strings of Te precipitates. Raised bumps are Te precipitates near the surface of the (112)B CdZnTe where the MBE preparation etch has not yet exposed the Te precipitate(s). An exposed Te precipitate sticking above the etched CdZnTe surface plane occurs when the MBE preparation etch rapidly undercuts a Te precipitate. Shallow surface pits are formed when the Te precipitate is completely undercut from the surrounding (112)B surface plane. The Te precipitate that was previously located at the center of the pit is liberated by the MBE preparation etch process.


Journal of Electronic Materials | 2013

High-Performance M/LWIR Dual-Band HgCdTe/Si Focal-Plane Arrays

M. F. Vilela; K.R. Olsson; Elyse Norton; J. M. Peterson; K. Rybnicek; David R. Rhiger; C. W. Fulk; James Bangs; D. D. Lofgreen; S. M. Johnson

Mercury cadmium telluride (HgCdTe) grown on large-area silicon (Si) substrates allows for larger array formats and potentially reduced focal-plane array (FPA) cost compared with smaller, more expensive cadmium zinc telluride (CdZnTe) substrates. In this work, the use of HgCdTe/Si for mid- wavelength/long-wavelength infrared (M/LWIR) dual-band FPAs is evaluated for tactical applications. A number of M/LWIR dual-band HgCdTe triple-layer n-P-n heterojunction device structures were grown by molecular-beam epitaxy (MBE) on 100-mm (211)Si substrates. Wafers exhibited low macrodefect densities (< 300 cm−2). Die from these wafers were mated to dual-band readout integrated circuits to produce FPAs. The measured 81-K cutoff wavelengths were 5.1 μm for band 1 (MWIR) and 9.6 μm for band 2 (LWIR). The FPAs exhibited high pixel operability in each band with noise-equivalent differential temperature operability of 99.98% for the MWIR band and 98.7% for the LWIR band at 81 K. The results from this series are compared with M/LWIR FPAs from 2009 to address possible methods for improvement. Results obtained in this work suggest that MBE growth defects and dislocations present in devices are not the limiting factor for detector operability, with regards to infrared detection for tactical applications.


Quantum sensing and nanophotonic devices. Conference | 2005

Status of HgCdTe/Si Technology for Large Format Infrared Focal Plane Arrays

S. M. Johnson; W. A. Radford; A. A. Buell; M. F. Vilela; J. M. Peterson; Jeffrey J. Franklin; R. E. Bornfreund; A. C. Childs; G. M. Venzor; M. D. Newton; E. P. G. Smith; Lee M. Ruzicka; Gregory K. Pierce; D. D. Lofgreen; Terence J. de Lyon; John E. Jensen

HgCdTe offers significant advantages over other semiconductors which has made it the most widely utilized variable-gap material in infrared focal plane array (FPA) technology. However, one of the main limitations of the HgCdTe materials system has been the size of lattice-matched bulk CdZnTe substrates, used for epitaxially-grown HgCdTe, which are 30 cm2 in size for production and have historically been difficult and expensive to scale in size. This limitation does not adequately support the increasing demand for larger FPA formats which now require sizes up to and beyond 2048 x 2048 and only a single die can be printed per wafer. Heteroepitaxial Si-based substrates offer a cost-effective technology that can be more readily scaled to large wafer sizes. Most of the effort in the IR community in the last 10 years has focused on growing HgCdTe directly on (112)Si substrates by MBE. At Raytheon we have scaled the MBE (112)HgCdTe/Si process originally developed at HRL for 3-in wafers, first to 4-in wafers and more recently to 6 in wafers. We have demonstrated a wide range of MWIR FPA formats up to 2560 x 512 in size and have found that their performance is comparable to arrays grown on bulk CdZnTe substrates by either MBE or LPE techniques. More recent work is focused on extending HgCdTe/Si technology to LWIR wavelengths. The goal of this paper is to review the current status of HgCdTe/Si technology both at Raytheon and the published work available from other organizations.


Journal of Electronic Materials | 2015

As-Received CdZnTe Substrate Contamination

J. D. Benson; L. O. Bubulac; M. Jaime-Vasquez; C. M. Lennon; P. J. Smith; R. N. Jacobs; J. K. Markunas; L. A. Almeida; A. J. Stoltz; J. M. Arias; Priyalal S. Wijewarnasuriya; J. M. Peterson; M. Reddy; M. F. Vilela; S. M. Johnson; D. D. Lofgreen; A. Yulius; M. Carmody; R. Hirsch; J. Fiala; S. Motakef

State-of-the-art as-received (112)B CdZnTe substrates were examined for surface impurity contamination, polishing damage, and tellurium precipitates/inclusions. A maximum surface impurity concentration of Alxa0=xa07.5xa0×xa01014, Sixa0=xa03.7xa0×xa01013, Clxa0=xa03.12xa0×xa01015, Sxa0=xa01.7xa0×xa01014, Pxa0=xa07.1xa0×xa01013, Fexa0=xa01.0xa0× xa01013, Brxa0=xa01.9xa0×xa01012, and Cuxa0=xa04xa0×xa01012 atoms cm−2 was observed on an as-received 6xa0×xa06xa0cm wafer. As-received CdZnTe substrates have scratches and residual polishing grit on the (112)B surface. Polishing scratches are 0.3xa0nm in depth and 0.1xa0μm wide. The polishing grit density was observed to vary from wafer-to-wafer from ∼5xa0×xa0106 to 2xa0×xa0108 cm−2. Te precipitate/inclusion size and density was determined by near-infrared automated microscopy. A Te precipitate/inclusion diameter histogram was obtained for the near-surface (top ~140xa0μm) of a 6xa0×xa06xa0cm substrate. The average areal Te precipitate/inclusion density was observed to be fairly uniform. However, there was a large density of Te precipitates/inclusions with a diameter significantly greater than the mean. Te precipitate/inclusion density >10xa0μm diameterxa0=xa02.8xa0×xa0103 cm−3. The large Te precipitates/inclusions are laterally non-uniformly distributed across the wafer.


Journal of Electronic Materials | 2014

Higher Dislocation Density of Arsenic-Doped HgCdTe Material

M. F. Vilela; K.R. Olsson; K. Rybnicek; James Bangs; K. Jones; S.F. Harris; K. D. Smith; D. D. Lofgreen

There is a well-known direct negative correlation between dislocation density and optoelectronic device performance. Reduction in detector noise associated with dislocations is an important target for improvement of mercury cadmium telluride (Hg1−xCdxTe)-based material in order to broaden its use in the very long-wavelength infrared (VLWIR) regime. The lattice mismatch and differences in physical properties between substrates and the epitaxial Hg1−xCdxTe layers cause an increased threading dislocation density. As demonstrated in this work, the presence of arsenic impurities via p-type doping in molecular beam epitaxy (MBE)-grown epitaxial crystal structure increases the etch pit density (EPD) of Hg1−xCdxTe grown on Si substrates but not on CdZnTe substrates. This EPD increase is not observed in indium n-type-doped Hg1−xCdxTe grown on either Si or CdZnTe substrates. This trend is also seen in layers with different cadmium compositions. All of the EPD variations of the structures studied here are shown to be independent of the MBE machine used to grow the structure. The fundamentals of this higher EPD are not yet completely understood.


Journal of Electronic Materials | 2013

Impurity Gettering in (112)B HgCdTe/CdTe/Alternate Substrates

J. D. Benson; L. O. Bubulac; C. M. Lennon; R. N. Jacobs; P. J. Smith; J. K. Markunas; M. Jaime-Vasquez; L. A. Almeida; A. J. Stoltz; J. A. Arias; G. Brill; Y. Chen; Priyalal S. Wijewarnasuriya; M. F. Vilela; J. M. Peterson; S. M. Johnson; D. D. Lofgreen; David R. Rhiger; E. A. Patten; James Bangs

The crystalline structure and impurity profiles of HgCdTe/CdTe/alternate substrate (AS; Si and GaAs are possibilities) and CdTe/AS were analyzed by secondary-ion mass spectrometry, atomic force microscopy, etch pit density analysis, and scanning transmission electron microscopy. Impurities (Li, Na, and K) were shown to getter in as-grown CdTe/Si epilayers at in situ Te-stabilized thermal anneal (~500°C) interfaces. In HgCdTe/CdTe/Si epilayers, indium accumulation was observed at Te-stabilized thermal anneal interfaces. Impurity accumulation was measured at HgCdTe/CdTe and CdTe/ZnTe interfaces. Processing anneals were found to nearly eliminate the gettering effect at the in situ Te-stabilized thermal anneal interfaces. Impurities were found to redistribute to the front HgCdTe/CdTe/Si surface and p–n junction interfaces during annealing steps. We also investigated altering the in situ Te-stabilized thermal anneal process to enhance the gettering effect.


Journal of Electronic Materials | 2012

HgCdTe Molecular Beam Epitaxy Growth Temperature Calibration Using Spectroscopic Ellipsometry

M. F. Vilela; G.K. Pribil; K.R. Olsson; D. D. Lofgreen

In this work, spectroscopic ellipsometry (SE) is demonstrated as a technique to calibrate growth temperature measurement devices (thermocouples and pyrometers) prior to real mercury cadmium telluride (HgCdTe) growth. A pyrometer is used to control the substrate temperature in molecular beam epitaxy (MBE) for the growth of HgCdTe-based material. It is known that a very narrow optimal growth temperature range exists for HgCdTe, typically ±5°C. A nonoptimal growth temperature will negatively impact on material quality by inducing growth defects, reducing composition uniformity, causing difficulty in controlling doping incorporation, promoting poor electronic properties, and having other adverse effects. Herein, we present a method for measuring and calibrating substrate temperature measurement equipment by using spectroscopic ellipsometry (SE) prior to real HgCdTe growth. This method is easy to implement, nondestructive, and reliable. The proposed method requires one substrate with a surface material with optical properties well known in the temperature range of interest, but not necessarily the same base material as the material to be grown. In the specific case of this work, we use epitaxial CdTe material on top of a Si substrate. This wafer was used to create a database of its optical properties as a function of temperature by using SE. From the collected optical parameters, a model is built and a fit is generated from the SE data collected. The temperature can then be determined by fitting the temperature-dependent SE measurements from this specific CdTe material. The angle offset and surface roughness parameters are also included in the model to account for changes in the average run-to-run angle variations and surface conditions over time. This work does not attempt to obtain an absolute temperature, but rather a reliable and repeatable relative temperature measurement.


Journal of Electronic Materials | 2004

HgCdTe/Si materials for long wavelength infrared detectors

S. M. Johnson; A. A. Buell; M. F. Vilela; J. M. Peterson; J. B. Varesi; M. D. Newton; G. M. Venzor; R. E. Bornfreund; W. A. Radford; E. P. G. Smith; Joseph P. Rosbeck; T. J. de Lyon; J. E. Jensen; Vaidya Nathan

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