J. S. Richardson-Bullock

Strain enhanced electron cooling in a degenerately doped semiconductor

Enhanced electron cooling is demonstrated in a strained-silicon/superconductor tunnel junction refrigerator of volume 40 μm3. The electron temperature is reduced from 300 mK to 174 mK, with the enhancement over an unstrained silicon control (300 mK–258 mK) being attributed to the smaller electron-phonon coupling in the strained case. Modeling and the resulting predictions of silicon-based cooler performance are presented. Further reductions in the minimum temperature are expected if the junction sub-gap leakage and tunnel resistance can be reduced. However, if only tunnel resistance is reduced, Joule heating is predicted to dominate.

Electrical isolation of dislocations in Ge layers on Si(001) substrates through CMOS-compatible suspended structures

Abstract Suspended crystalline Ge semiconductor structures are created on a Si(001) substrate by a combination of epitaxial growth and simple patterning from the front surface using anisotropic underetching. Geometric definition of the surface Ge layer gives access to a range of crystalline planes that have different etch resistance. The structures are aligned to avoid etch-resistive planes in making the suspended regions and to take advantage of these planes to retain the underlying Si to support the structures. The technique is demonstrated by forming suspended microwires, spiderwebs and van der Pauw cross structures. We finally report on the low-temperature electrical isolation of the undoped Ge layers. This novel isolation method increases the Ge resistivity to 280 Ω cm at 10 K, over two orders of magnitude above that of a bulk Ge on Si(001) layer, by removing material containing the underlying misfit dislocation network that otherwise provides the main source of electrical conduction.

Interfacial Engineering of Semiconductor-Superconductor Junctions for High Performance Micro-Coolers.

The control of electronic and thermal transport through material interfaces is crucial for numerous micro and nanoelectronics applications and quantum devices. Here we report on the engineering of the electro-thermal properties of semiconductor-superconductor (Sm-S) electronic cooler junctions by a nanoscale insulating tunnel barrier introduced between the Sm and S electrodes. Unexpectedly, such an interface barrier does not increase the junction resistance but strongly reduces the detrimental sub-gap leakage current. These features are key to achieving high cooling power tunnel junction refrigerators, and we demonstrate unparalleled performance in silicon-based Sm-S electron cooler devices with orders of magnitudes improvement in the cooling power in comparison to previous works. By adapting the junctions in strain-engineered silicon coolers we also demonstrate efficient electron temperature reduction from 300 mK to below 100 mK. Investigations on junctions with different interface quality indicate that the previously unexplained sub-gap leakage current is strongly influenced by the Sm-S interface states. These states often dictate the junction electrical resistance through the well-known Fermi level pinning effect and, therefore, superconductivity could be generally used to probe and optimize metal-semiconductor contact behaviour.

Hole-phonon energy loss rate in boron doped silicon

The hole-phonon energy loss rate in silicon is measured at phonon temperatures ranging from 300 mK to 700 mK. We demonstrate that it is approximately an order of magnitude higher than the corresponding electron-phonon energy loss rate in the same material over an identical temperature range.

Using platinum silicide as a superconductor for silicon electron coolers

An electron cooling junction using platinum silicide as a superconductor contact is demonstrated for the first time. The junction shows encouraging electrical characteristics and a fit to a standard cooling model predicts cooling from 100 mK to 50 mK for a test device. Silicides have been widely used in the semiconductor industry because of their reliability and reduced contact resistance; hence this technology could find wider application in a silicon-based electron refrigerator.

Ultra-High Hall Mobility (1 x 106 cm2V-1S-1) in a Two-Dimensional Hole Gas in a Strained Germanium Quantum Well Grown by Reduced Pressure CVD

In this work, a hole mobility of one million in germanium is reported. This extremely high value of 1.1 x 106 cm2V-1s-1 at a carrier sheet density of 3.0 x 1011 cm-2 is observed in a strained Ge quantum well structure grown by reduced-pressure chemical vapor deposition (RP-CVD) and is nearly an order of magnitude higher than previously reported values.

Novel fabrication technique for Ge membranes

Suspended crystalline Ge semiconductor structures are created on a Si(001) substrate by a combination of epitaxial growth and simple patterning from the front surface using anisotropic underetching. Geometric definition of the surface Ge layer gives access to a range of crystalline planes that have different etch resistance. The structures are aligned to avoid etch-resistive planes in making the suspended regions and to take advantage of these planes to retain the underlying Si to support the structures. The technique is demonstrated by forming suspended microwires, spiderwebs and van der Pauw cross structures. We finally report on the low-temperature electrical isolation of the undoped Ge layers. This novel isolation method increases the Ge resistivity to 280 Ω cm at 10 K, over two orders of magnitude above that of a bulk Ge on Si(001) layer, by removing material containing the underlying misfit dislocation network that otherwise provides the main source of electrical conduction.

Cooltronics: A new low-temperature tunneling-technology based on Silicon

A silicon-superconductor tunnel junction is capable of cooling electrons from a temperature of 300 mK to 150 mK and below when a current is passed through it and may also be used as the thermometer in a silicon “cold electron bolometer”. Recent work on these novel devices is described here.

Simple Fabrication of Suspended Germanium Structures and Their Electrical Properties from High Quality Ge on Si(001) Layers

In this work, we present a method to isolate this dislocation conduction within a Ge on Si layer at low temperatures through removing the Ge/Si interface to reduce dislocation leakage.