Jaehyok Yi

Adaptive Digital Feedback Predistortion Technique for Linearizing Power Amplifiers

We have developed a new adaptive digital predistortion (DPD) linearization technique based on analog feedback predistortion (FBPD). The lookup-table-based feedback input can remove the bandwidth limitation of the feedback circuit related to the loop delay, and suppress feedback oscillation by accurate digital control of the feedback signal. Moreover, the predistortion (PD) signal can be extracted very efficiently. By combining the feedback linearization and DPD linearization techniques, the performance of the predistorter is enhanced significantly compared to the conventional DPD. To clearly visualize the characteristics of digital FBPD (DFBPD), we have compared it to the conventional DPD based on the recursive least square algorithm using Matlab simulation. The results clearly show that the new method is a good linearization algorithm, better than a conventional DPD. For the demonstration, a Doherty power amplifier with 180-W peak envelope power is linearized using the proposed DFBPD. For a 2.14-GHz forward-link wideband code-division multiple-access signal, the adjacent channel leakage ratio at 2.5-MHz offset is -58 dBc, which is improved by 15 dB at an average output power of 43 dBm

Analog predistortion linearizer for high power rf amplifier

Analog predistortion linearizer for the high power amplifier of CDMA base station has been developed. To suppress the spectral regrowth in the adjacent channel effectively, the odd order intermodulation distortions should be cancelled. For the purpose, the predistorter, which can cancel the 3rd and 5th intermodulation distortions independently, has been employed. The implemented pre-distorter linearized the RF amplifier with average power 45 dBm at 2.37-2.4 GHz band. 9 dB suppression of spectral regrowth was achieved for CDMA signal over 30 MHz bandwidth.

Linear power amplifier based on 3-way Doherty amplifier with predistorter

This paper presents a 3-way Doherty amplifier with predistorter (PD) for a repeater application. It is implemented using three 60 Watts PEP silicon LDMOSFETs and tested using two-tone and one- and two-carrier down-link WCDMA signals. For the two-carrier downlink WCDMA signal, the amplifier provides -49.1 dBc adjacent-channel-leakage-ratio (ACLR) and 10.3% power-added efficiency (PAE) at an output power 40 dBm which is an improvement of 8.5 dBc in linearity and 2% in efficiency compared to a similar class-AB amplifier.

Analog predistortion linearizer for high-power RF amplifiers

We have developed an analog predistortion linearizer for a high-power amplifier of a code-division multiple-access (CDMA) base station. To effectively suppress the spectral regrowth in the adjacent channels, the odd-order intermodulation distortions (IMDs) should be cancelled. To accomplish this purpose, we employed a predistorter, which can cancel the third and fifth IMDs independently. The implemented predistorter linearized the RF amplifier with an average power of 45 dBm at 2.37-2.4-GHz band. A 9-dB suppression of spectral regrowth, from 33 to 42 dBc, was achieved for the CDMA signal with an 8.192-Mc/s chip rate over a 30-MHz bandwidth.

Optimum design of a predistortion RF power amplifier for multicarrier WCDMA applications

This paper provides a design guide for optimum design of an RF power amplifier with a predistortion linearizer. For a two-tone signal, three performance degradation factors, higher order terms, amplitude, and phase mismatches are analyzed quantitatively. The results are implemented to the design of optimized predistortion power amplifier for a WCDMA signal application. For the experiments, a 2.4-GHz class-AB power amplifier is fabricated using an LDMOSFET with a 30-W peak envelope power. A simple third-order predistorter is used to measure the relative phases of the harmonics, as well as to linearize the amplifier. The performance of the optimized predistortion power amplifier is excellent for an IS-95 code-division-multiple-access signal. Finally, a method for reducing the memory effects of the amplifier is devised to get a good cancellation performance for a wide-band signal, and the performance degradation caused by the memory effects is analyzed. For a forward-link four-carrier WCDMA signal, the predistortion power amplifier delivers an adjacent channel leakage ratio of -46 dBc at a 4-W average output power with a cancellation of 13.4 dB.

Effect of efficiency optimization on linearity of LINC amplifiers with CDMA signal

The linear and efficient power amplification can be achieved with LINC (linear amplification with nonlinear components) amplifiers because RF power amplifiers deal with constant envelope signals in LINC systems. To increase the average efficiency in some modulation schemes with high peak to average ratio, reactance termination in combining circuit is used. However, the shunt reactance termination degrades the linearity performance of LINC. This work shows the effect of efficiency optimization with reactance termination on ACLR (Adjacent Channel Leakage Ratio) of LINC amplifiers with WCDMA modulation systems using envelope simulation.

Experimental investigation on efficiency and linearity of microwave Doherty amplifier

We have investigated the microwave Doherty amplifier, testing for efficiency and linearity. For the experiment, a 1.4 GHz Doherty amplifier has been implemented using a silicon LDMOSFET. The Doherty amplifier-I (a combination of a class B carrier amplifier and a class C peaking amplifier) and the Doherty amplifier-II (a combination of a class AB carrier amplifier and a class C peaking amplifier) have been compared with class B and AB amplifiers, respectively, using single-tone, two-tone, and forward-link CDMA signals. It demonstrated the superior performance of Doherty amplifiers. The results provide a topology selection guide of the CDMA base station power amplifier to achieve both linearity and efficiency enhancements.

A new empirical large-signal model of Si LDMOSFETs for high-power amplifier design

We propose a new empirical large-signal model of silicon laterally diffused MOSFETs for the design of various modes of high-power amplifiers. The new channel current model has only nine parameters that represent the unique operation principles of a MOSFET. In the channel current model, we include the thermal phenomena of high-power devices. To accurately characterize high-power devices, we incorporate the channel heating and heat-sink heating effects by providing two thermal capacitances and two thermal resistances. Nonlinear capacitances, including deep subthreshold and triode regions, as well as normal saturation regions, are extracted and modeled. For validation of our model, a 1.4-GHz 5-W amplifier is implemented, and the measured and simulated results match very well.

SDR transmitter based on LINC amplifier with bias control

This paper describes a LINC (Linear Amplification using Nonlinear Components) handset transmitter adopting DC bias control. The power amplifier is operated at a saturated output power level and its level is adjusted by DC bias control. Thus the transmitter guarantees high efficiency at all usable output power level. Due to the LINC linearization, it can operate as a linear power amplifier. The new LINC transmitter can be used as a transmitter for software defined radio (SDR), since it can efficiently amplify both the GSM type constant envelope signal and CDMA type non-constant envelope signal, and its control part is very simple and mostly embodied in the digital domain. For verification, a 1.71 GHz LINC prototype transmitter has been implemented and tested. The results, compared with conventional cases, clearly show the suitability of the new LINC transmitter for SDR application.

Weighted Polynomial Digital Predistortion for Low Memory Effect Doherty Power Amplifier

We have proposed a simple and effective weighted polynomial digital predistortion algorithm, which consists of weighting, least square polynomial fit, and de-weighting. The weighting factor is introduced to describe the signal distribution statistics and high harmonic generation at a high power region to improve accuracy of the error function. A low memory linear Doherty power amplifier (PA) has been realized with two 90-W peak envelope power LDMOSFETs using memory effect reduction techniques, and the proposed algorithm has been applied to the PA. For the forward-link wideband code division multiple access 3FA signal, the adjacent channel leakage ratio performance at 5-MHz offset is -56 dBc with power-added efficiency of 20.78% at an average power of 40 dBm. The proposed weighting polynomial algorithm provides a significantly reduced error power and superior convergence behavior with improved linearization capability than the conventional polynomial. Moreover, the low memory Doherty amplifier could be linearized for a wideband signal using the simple algorithm without any memory effect compensation