Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Jang-Gn Yun is active.

Publication


Featured researches published by Jang-Gn Yun.


IEEE Transactions on Electron Devices | 2012

Three-Dimensional nand Flash Architecture Design Based on Single-Crystalline STacked ARray

Yoon Young Kim; Jang-Gn Yun; Se Hwan Park; Wandong Kim; Joo Yun Seo; Myounggon Kang; Kyung-Chang Ryoo; Jeong-Hoon Oh; Jong-Ho Lee; Hyungcheol Shin; Byung-Gook Park

Various critical issues related with 3-D stacked nand Flash memory are examined in this paper. Our single-crystalline STacked ARray (STAR) has many advantages such as better scalability, possibility of single-crystal channel, less sensitivity to 3-D interference, stable virtual source/drain characteristic, and more extendability over other stacked structures. With STAR, we proposed a unit 3-D structure, i.e., “building.” Then, using this new component, 3-D block and full chip architecture are successfully designed. For the first time, the structure and operation methods of the “full” array are considered. The fully designed 3-D nand Flash architecture will be the novel solution of reliable 3-D stacked nand Flash memory for terabit density.


IEEE Transactions on Electron Devices | 2011

Single-Crystalline Si STacked ARray (STAR) NAND Flash Memory

Jang-Gn Yun; Garam Kim; Yoon Young Kim; Won Bo Shim; Jong-Ho Lee; Hyungcheol Shin; Jong Duk Lee; Byung-Gook Park

In this paper, a 3-D NAND Flash memory array having multiple single-crystal Si nanowires is investigated. Device structure and fabrication process are described including the electrical isolation of stacked nanowires. Numerical simulation results focused on NAND Flash memory operation are delivered. Devices and array with stacked bit lines are fabricated, and memory characteristics such as program/erase select gate operation are measured. Array scheme is also discussed for the high-density bit-cost scalable 3-D stacked bit-line NAND Flash memory application.


Archive | 2014

GATE STRUCTURE IN NON-VOLATILE MEMORY DEVICE

Jang-Gn Yun; Jung-Dal Choi; Kwang-Soo Seol


Archive | 2014

SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES

Jang-Gn Yun; HongSoo Kim; Aaron Park; Hoosung Cho


Archive | 2014

Wiring structures for three-dimensional semiconductor devices

Jang-Gn Yun; HongSoo Kim; Hoosung Cho


Archive | 2015

Methods of operating a nonvolatile memory device

Sunil Shim; Joon-Sung Lim; Jin-kyu Kang; Euido Kim; Jang-Gn Yun


Archive | 2017

Semiconductor devices and methods for forming the same

Jang-Gn Yun; Sung-Hoi Hur; Jaesun Yun; Joon-Sung Lim


Archive | 2015

SEMICONDUCTOR DEVICES INCLUDING A PERIPHERAL CIRCUIT REGION AND FIRST AND SECOND MEMORY REGIONS, AND RELATED PROGRAMMING METHODS

Joon-Sung Lim; Jang-Gn Yun; Hoosung Cho


Archive | 2017

THREE-DIMENSIONAL SEMICONDUCTOR DEVICES WITH SCRIBE LINE REGION STRUCTURES

Jaeho Jeong; Sun-Young Kim; Jang-Gn Yun; Hoosung Cho; Sung-Hoi Hur


Archive | 2015

SEMICONDUCTOR DEVICE HAVING INTERCONNECTION LINE

Jang-Gn Yun; Hoosung Cho; Jaesun Yun

Collaboration


Dive into the Jang-Gn Yun's collaboration.

Top Co-Authors

Avatar
Top Co-Authors

Avatar

Byung-Gook Park

Seoul National University

View shared research outputs
Top Co-Authors

Avatar

Hyungcheol Shin

Seoul National University

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Jong-Ho Lee

Seoul National University

View shared research outputs
Top Co-Authors

Avatar

Yoon Young Kim

Seoul National University

View shared research outputs
Top Co-Authors

Avatar

Garam Kim

Seoul National University

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Jeong-Hoon Oh

Seoul National University

View shared research outputs
Researchain Logo
Decentralizing Knowledge