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Featured researches published by Jang-Hee Lee.


international interconnect technology conference | 2011

Robust porous SiOCH (k=2.5) for 28nm and beyond technology node

Jang-Hee Lee; Sang-hoon Ahn; Insun Jung; Kyu-hee Han; Gyeong-Hee Kim; Sang-don Nam; Woo Sung Jeon; Byeong Hee Kim; Gil Heyun Choi; Si-Young Choi; Ho-Kyu Kang; Chilhee Chung

Robust p-SiOCH was deposited in a PECVD reactor using Si precursor with Si-C-C-Si bond structure. It achieved its elastic modulus of 8.4GPa at k=2.55, comparable to the reference silica-based p-SiOCH that has been widely evaluated among the major chipmakers. However, its post-integration k increase was ∼0.1 on a 100nm-pitched single damascene line and negligible on a 90nm-pitched trench first metal hardmask dual damascene line. Its superb performance in plasma damage resistance without the sacrifice in its mechanical strength can be attributed to the presence of bridged carbon(s) between Si atoms in addition to the methyl functional group. According to 29Si and 13C nuclear magnetic resonance (NMR) spectra, bridged carbon and carbon in the methyl group exist approximately in 1∶1 ratio in the robust p-SiOCH.


international interconnect technology conference | 2012

Successful recovery of moisture-induced TDDB degradation for Cu/ULK(k=2.5) BEOL interconnect

Sang-hoon Ahn; Tae-soo Kim; Viet Ha Nguyen; OkHee Park; Kyu-hee Han; Jang-Hee Lee; Jong-Myeong Lee; Gil-heyun Choi; Ho-Kyu Kang; Chilhee Chung

Cu/ULK(k=2.5) dual Damascene back end of line(BEOL) dielectric degradation was studied with respect to post Cu CMP delay prior to dielectric diffusion barrier deposition. The threshold of the delay time was observed beyond which line-to-line leakage current increased rapidly while the dielectric breakdown voltage decreased. This air exposure-dependent degradation was attributed to moisture absorption by damaged ULK during integration, and caused premature TDDB (time-dependent dielectric breakdown) failure. It was found that combination of moisture removal by damage-free UV and mild plasma treatment was able to restore dielectric breakdown voltage as well as TDDB time to failure even well past the threshold of delay time.


Archive | 2005

Method of forming a gate of a semiconductor device

Sun-pil Youn; Chang-won Lee; Woong-Hee Sohn; Gil-heyun Choi; Jong-ryeol Yoo; Jang-Hee Lee; Jae-hwa Park; Dong-Chan Lim; Byung-Hak Lee; Hee-sook Park


Archive | 2006

Gate and method of forming the same, and memory device and method of manufacturing the same

Geumjung Seong; Gil-heyun Choi; Byung-hee Kim; Tae-Ho Cha; Hee-sook Park; Jang-Hee Lee


Archive | 2013

Method of forming through silicon via of semiconductor device using low-k dielectric material

Kyu-hee Han; Sang-hoon Ahn; Jang-Hee Lee; Jong-min Beak; Kyoung-Hee Kim; Byung-Iyul Park; Byung-hee Kim


Archive | 2008

Semiconductor device including interlayer interconnecting structures and methods of forming the same

Hyun-Su Kim; Dae-Yong Kim; Eun-Ok Lee; Byung-hee Kim; Jang-Hee Lee; Eun-ji Jung; Gil-heyun Choi


Archive | 2010

METHOD OF FORMING BURIED GATE ELECTRODE

Eun-ji Jung; Hyunsoo Kim; Byung-hee Kim; Dae-Yong Kim; Woong-Hee Sohn; Kwang-jin Moon; Jang-Hee Lee; Min-Sang Song; Eun-Ok Lee


Archive | 2008

Nonvolatile memory device and method for forming the same

Jang-Hee Lee; Gil-heyun Choi; Byung-hee Kim; Tae-Ho Cha; Hee-sook Park; Geumjung Seong


Archive | 2006

Semiconductor device multilayer structure, fabrication method for the same, semiconductor device having the same, and semiconductor device fabrication method

Jae-hwa Park; Jang-Hee Lee; Dae-Yong Kim; Hee-sook Park


Archive | 2006

DUAL GATE STRUCTURE, FABRICATION METHOD FOR THE SAME, SEMICONDUCTOR DEVICE HAVING THE SAME, AND SEMICONDUCTOR DEVICE FABRICATION METHOD

Hee-sook Park; Jae-hwa Park; Jang-Hee Lee; Geumjung Seong; Byung-Hak Lee; Dong-Chan Lim; Tae-Ho Cha

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