Jang-Woo Ryu

A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4

Mobile DRAM is widely employed in portable electronic devices due to its feature of low power consumption. Recently, as the market trend renders integration of various features in one chip, mobile DRAM is required to have not only low power consumption but also high capacity and high speed. To attain these goals in mobile DRAM, we designed a 1Gb single data rate (SDR) Wide-I/O mobile SDRAM with 4 channels and 512 DQ pins, featuring 12.8GB/s data bandwidth.

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The recent revolution in handheld computing with high-speed cellular network made mobile processors have multi-cores and powerful 3D graphic engines that support FHD (1920×1080) or even higher resolutions. Consequently, the memory bandwidth requirement has also been increasing, requiring a next-generation mobile DRAM standard. In this paper, we present a power-efficient LPDDR4 SDRAM operating at 3.2Gb/s/pin. Our LPDDR4 DRAM offers 2× bandwidth with improved power efficiency over LPDDR3 SDRAMs, due to the 2-channel architecture and low-voltage-swing terminated logic (LVSTL) [1]. Moreover, the supply voltage is further reduced to 1.0V in this work, 0.1V lower than the LPDDR4 standard, for extra power saving.