Janice Chiu

A dual mode 802.11b/Bluetooth radio in 0.35/spl mu/m CMOS

A dual-mode CMOS 2.4GHz transceiver consumes 65mA in RX and 78mA in TX from a 3V supply. The receiver achieves a typical sensitivity of -88dBm at 11Mb/s for 802.11b, and -83dBm for Bluetooth mode. The receiver minimum IIP3 is -8dBm, and the transmitter delivers a nominal output power of 0dBm, with a power control range of 20dB in 2dB steps.

An IP2 Improvement Technique for Zero-IF Down-Converters

An IP2 calibration circuit to improve the 2nd-order nonlinearity of mixers in zero or low-IF receivers is presented. The circuit allows the mixers to be optimized independently, and has negligible impact on receiver noise figure, area, and power consumption. A prototype transceiver including the calibration circuitry in 0.13mum CMOS is fabricated. An average IIP2 improvement of 18dB is measured

A quad-band GSM/GPRS/EDGE SoC in 65nm CMOS

A quad-band 2.5G SoC integrates all the RF, DSP, ARM, audio and other baseband processing functions into a single 65nm CMOS die. The radio draws a battery current of 49mA in the RX-mode, and 86mA in the GMSK TX-mode. The low-IF receiver achieves a sensitivity of −110dBm at the antenna, corresponding to a noise figure of 2.4dB at the device input. The 8PSK ±400kHz modulation mask is −64.1/62.7dBc for high/low bands, with an RMS EVM of 2.45/1.95%.

A Quad-Band GSM/GPRS/EDGE SoC in 65 nm CMOS

A quad-band 2.5G SoC integrating all the RF, DSP, ARM, audio and other baseband processing functions into a single 65 nm CMOS die is described. The paper focuses on the radio portion mostly, and addresses the challenges of realizing a complete GSM/EDGE SoC with the RF integrated along with the rest of digital baseband circuitry. Several circuit level as well as architectural techniques are presented to realize a very low-cost and low-power 2.5G radio while meeting the stringent cellular requirements with wide margin. The radio draws a battery current of 49 mA in the receiver-mode, and 86/77 mA in the GMSK/8PSK transmit-mode. The low-IF receiver achieves a sensitivity of -110 dBm at the antenna, corresponding to a noise figure of 2.4 dB at the device input. The 8PSK±400 kHz modulation mask is - 64.1/62.7 dBc for high/low bands, with an RMS EVM of 2.45/1.95%. The radio core area is 3.95 mm2 .

A Fully Integrated Quad-Band GPRS/EDGE Radio in 0.13μm CMOS

This radio integrates all the receive and transmit functions required to support a quad-band GSM/GPRS/EDGE application into a single CMOS chip. Compared to the published work, this transceiver is implemented in low-cost digital 0.13 mum CMOS, achieves a superior receive and transmit performance, and yet has up to 2x lower receive power consumption, a key requirement in cellular applications.

A 13.5mA sub-2.5dB NF multi-band receiver

An ultra low-power multi-band receiver covering any frequency band in the range 0.7-2.5GHz is fabricated in 40nm CMOS and occupies a total area of 1.5mm2. The receiver achieves a NF of 2.4dB, with -2dBm IIP3, and a peak SNR of 35dB, while consuming 13.5mA from the battery, more than three times power reduction compared to prior art.

A Rel-12 2G/3G/LTE-Advanced 3CC Cellular Receiver

This work presents a receiver capable of receiving three simultaneous cellular channels with an aggregate bandwidth of 60 MHz, enabling a 300 Mb/s downlink rate. The receiver has 16 RF LNA ports covering the cellular bands within the 572-2700 MHz frequency range. It supports LTE-advanced Rel-12 Cat6, HSPA+ Rel-11, TD-SCDMA Rel-9, and GSM/EDGE Rel-9. The 40 nm CMOS receiver consumes 13.7 and 17.6 mA of battery current in 3G and LTE modes, respectively, including the PLL, DCXO, and biasing for a single channel.

A Rel-12 2G/3G/LTE-advanced 2CC transmitter

This work presents a cellular transceiver capable of transmitting two simultaneous channels with an aggregate bandwidth of up to 40 MHz, supporting a 100 Mbps uplink rate. The transmitter has 8 RF output ports covering the cellular transmit bands within the 572–2100 MHz frequency range. It can support TX LTE-advanced Rel-12 Cat7, HSPA+ Rel-11, TDSCDMA Rel-9, and GSM/EDGE Rel-9. The 40 nm CMOS transmitter consumes 22 mA and 27 mA in 3G and LTE modes (at 0 dBm antenna power), respectively, including the PLL, DCXO and biasing for a single channel.

A Rel-12 2G/3G/LTE-advanced 3CC receiver

This work presents a cellular receiver capable of receiving three simultaneous channels with an aggregate bandwidth of 60 MHz, enabling a 300 Mbps downlink rate. The receiver has 16 RF LNA ports covering the cellular bands within the 572-2700 MHz frequency range. It supports LTE-advanced Rel-12 Cat6, HSPA+ Rel-11, TD-SCDMA Rel-9, and GSM/EDGE Rel-9. The 40 nm CMOS receiver consumes 13.7 mA and 17.6 mA of battery current in 3G and LTE modes, respectively, including the PLL, DCXO, and bia sing for a single channel.

Transmitter development for cellular integrated circuits

This article reviews transmitter topologies for radio transceivers with emphasis on cellular applications. In the first section it discusses different architectures and the challenges in practical implementations. Then it presents a transmitter as part of a fully integrated transceiver for GSM/GPRS/EDGE.