Jashojiban Banik

A 150 MHz 0.6 μm BiCMOS superscalar microprocessor

An implementation of the Pentium microprocessor architecture in 0.6 /spl mu/m BiCMOS technology is described. Power dissipation is reduced and performance is enhanced over the previous generation. Processor features, implementation technology, and circuit techniques are discussed. An internal clock rate of 150 MHz is achieved at 3.7 V and -55/spl deg/C. >

A high performance 0.35-/spl mu/m 3.3-V BiCMOS technology optimized for product porting from a 0.6-/spl mu/m 3.3-V BiCMOS technology

A 0.35-/spl mu/m logic technology has been developed with high performance transistors and four layers of planarized metal interconnect. A 2.5-V version offers lower power and higher performance. A 3.3-V BiCMOS version has been optimized for compatibility with previous designs implemented in a 0.6-/spl mu/m 3.3-V BiCMOS process. A two-step design process for converting an existing production worthy 0.6-/spl mu/m 3.3-V BiCMOS design to a 0.35-/spl mu/m design is described. The silicon results are described.

A 150 MHz 0.6 /spl mu/m BiCMOS superscalar microprocessor

An implementation of the Pentium microprocessor architecture in 0.6 /spl mu/m BiCMOS technology is described. Power dissipation is reduced and performance is enhanced over the previous generation. Processor features, implementation technology, and circuit techniques are discussed. An internal clock rate of 150 MHz is achieved at 3.7 V and -55/spl deg/C. >

150 MHz 0.6 μm BiCMOS superscalar microprocessor

An implementation of the Pentium microprocessor architecture in 0.6 /spl mu/m BiCMOS technology is described. Power dissipation is reduced and performance is enhanced over the previous generation. Processor features, implementation technology, and circuit techniques are discussed. An internal clock rate of 150 MHz is achieved at 3.7 V and -55/spl deg/C. >